skl mainboards: Move cpu_cluster device to chipset devicetree

Change-Id: I7114612e686a0bf3cfc241f45fa62077fad16f5a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Felix Singer
2024-06-23 00:09:39 +02:00
parent 273be9f251
commit c0ba181403
31 changed files with 1 additions and 33 deletions

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@@ -100,7 +100,6 @@ chip soc/intel/skylake
# Send an extra VR mailbox command for the PS4 exit issue # Send an extra VR mailbox command for the PS4 exit issue
register "SendVrMbxCmd" = "2" register "SendVrMbxCmd" = "2"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref sa_thermal on end device ref sa_thermal on end

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@@ -32,7 +32,6 @@ chip soc/intel/skylake
[PchSerialIoIndexUart2] = PchSerialIoSkipInit, [PchSerialIoIndexUart2] = PchSerialIoSkipInit,
}" }"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
subsystemid 0x1025 0x1037 inherit subsystemid 0x1025 0x1037 inherit
device ref system_agent on device ref system_agent on

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@@ -41,7 +41,6 @@ chip soc/intel/skylake
# Send an extra VR mailbox command for the PS4 exit issue # Send an extra VR mailbox command for the PS4 exit issue
register "SendVrMbxCmd" = "2" register "SendVrMbxCmd" = "2"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref system_agent on device ref system_agent on
subsystemid 0x1849 0x191f subsystemid 0x1849 0x191f

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@@ -35,7 +35,6 @@ chip soc/intel/skylake
[PchSerialIoIndexUart2] = PchSerialIoSkipInit, // LPSS UART [PchSerialIoIndexUart2] = PchSerialIoSkipInit, // LPSS UART
}" }"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
subsystemid 0x1558 0x1313 inherit subsystemid 0x1558 0x1313 inherit
device ref system_agent on end device ref system_agent on end

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@@ -214,7 +214,6 @@ chip soc/intel/skylake
[PchSerialIoIndexUart2] = PchSerialIoDisabled, [PchSerialIoIndexUart2] = PchSerialIoDisabled,
}" }"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref sa_thermal on end device ref sa_thermal on end

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@@ -228,7 +228,6 @@ chip soc/intel/skylake
}" }"
register "tcc_offset" = "10" register "tcc_offset" = "10"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref sa_thermal on end device ref sa_thermal on end

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@@ -305,7 +305,6 @@ chip soc/intel/skylake
}" }"
register "tcc_offset" = "6" # TCC of 94C register "tcc_offset" = "6" # TCC of 94C
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref sa_thermal on end device ref sa_thermal on end

View File

@@ -81,7 +81,6 @@ chip soc/intel/skylake
# Send an extra VR mailbox command for the PS4 exit issue # Send an extra VR mailbox command for the PS4 exit issue
register "SendVrMbxCmd" = "2" register "SendVrMbxCmd" = "2"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref sa_thermal on end device ref sa_thermal on end

View File

@@ -227,7 +227,6 @@ chip soc/intel/skylake
[PchSerialIoIndexUart2] = PchSerialIoSkipInit, [PchSerialIoIndexUart2] = PchSerialIoSkipInit,
}" }"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref system_agent on end device ref system_agent on end
device ref igpu on end device ref igpu on end

View File

@@ -249,7 +249,6 @@ chip soc/intel/skylake
# Use default SD card detect GPIO configuration # Use default SD card detect GPIO configuration
register "sdcard_cd_gpio" = "GPP_E15" register "sdcard_cd_gpio" = "GPP_E15"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref system_agent on end device ref system_agent on end
device ref igpu on end device ref igpu on end

View File

@@ -273,7 +273,6 @@ chip soc/intel/skylake
.psys_pmax = 101, .psys_pmax = 101,
}" }"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref system_agent on end device ref system_agent on end
device ref igpu on end device ref igpu on end

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@@ -280,7 +280,6 @@ chip soc/intel/skylake
# Use default SD card detect GPIO configuration # Use default SD card detect GPIO configuration
register "sdcard_cd_gpio" = "GPP_E15" register "sdcard_cd_gpio" = "GPP_E15"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref system_agent on end device ref system_agent on end
device ref igpu on end device ref igpu on end

View File

@@ -244,7 +244,6 @@ chip soc/intel/skylake
[PchSerialIoIndexUart2] = PchSerialIoSkipInit, [PchSerialIoIndexUart2] = PchSerialIoSkipInit,
}" }"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref system_agent on end device ref system_agent on end
device ref igpu on end device ref igpu on end

View File

@@ -230,7 +230,6 @@ chip soc/intel/skylake
# Use default SD card detect GPIO configuration # Use default SD card detect GPIO configuration
register "sdcard_cd_gpio" = "GPP_E15" register "sdcard_cd_gpio" = "GPP_E15"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref system_agent on end device ref system_agent on end
device ref igpu on end device ref igpu on end

View File

@@ -259,7 +259,6 @@ chip soc/intel/skylake
# Use default SD card detect GPIO configuration # Use default SD card detect GPIO configuration
register "sdcard_cd_gpio" = "GPP_E15" register "sdcard_cd_gpio" = "GPP_E15"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref system_agent on end device ref system_agent on end
device ref igpu on end device ref igpu on end

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@@ -7,7 +7,6 @@ chip soc/intel/skylake
register "eist_enable" = "1" register "eist_enable" = "1"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
subsystemid 0x103c 0x2b5e inherit subsystemid 0x103c 0x2b5e inherit
device ref peg0 on end device ref peg0 on end

View File

@@ -109,7 +109,6 @@ chip soc/intel/skylake
# Send an extra VR mailbox command for the PS4 exit issue # Send an extra VR mailbox command for the PS4 exit issue
register "SendVrMbxCmd" = "2" register "SendVrMbxCmd" = "2"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref sa_thermal on end device ref sa_thermal on end

View File

@@ -153,7 +153,6 @@ chip soc/intel/skylake
# Use default SD card detect GPIO configuration # Use default SD card detect GPIO configuration
register "sdcard_cd_gpio" = "GPP_G5" register "sdcard_cd_gpio" = "GPP_G5"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref i2c2 off end device ref i2c2 off end
device ref i2c3 off end device ref i2c3 off end

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@@ -161,7 +161,6 @@ chip soc/intel/skylake
# Use default SD card detect GPIO configuration # Use default SD card detect GPIO configuration
register "sdcard_cd_gpio" = "GPP_A7" register "sdcard_cd_gpio" = "GPP_A7"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref sa_thermal on end device ref sa_thermal on end

View File

@@ -196,7 +196,6 @@ chip soc/intel/skylake
# Use default SD card detect GPIO configuration # Use default SD card detect GPIO configuration
#register "sdcard_cd_gpio" = "GPP_A7" #register "sdcard_cd_gpio" = "GPP_A7"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref south_xhci on end device ref south_xhci on end

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@@ -63,8 +63,6 @@ chip soc/intel/skylake
# Send an extra VR mailbox command for the PS4 exit issue # Send an extra VR mailbox command for the PS4 exit issue
register "SendVrMbxCmd" = "2" register "SendVrMbxCmd" = "2"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref gmm on end device ref gmm on end

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@@ -117,7 +117,6 @@ chip soc/intel/skylake
# Send an extra VR mailbox command for the PS4 exit issue # Send an extra VR mailbox command for the PS4 exit issue
register "SendVrMbxCmd" = "2" register "SendVrMbxCmd" = "2"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x30d0 inherit subsystemid 0x17aa 0x30d0 inherit
device ref igpu on device ref igpu on

View File

@@ -3,7 +3,6 @@
chip soc/intel/skylake chip soc/intel/skylake
register "eist_enable" = "true" register "eist_enable" = "true"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref peg0 on # PCIE16X device ref peg0 on # PCIE16X
# These configurations are technically for PCIe root # These configurations are technically for PCIe root

View File

@@ -159,7 +159,6 @@ chip soc/intel/skylake
# Send an extra VR mailbox command for the PS4 exit issue # Send an extra VR mailbox command for the PS4 exit issue
register "SendVrMbxCmd" = "2" register "SendVrMbxCmd" = "2"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref sa_thermal on end device ref sa_thermal on end

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@@ -189,7 +189,6 @@ chip soc/intel/skylake
[PchSerialIoIndexUart2] = PchSerialIoDisabled, [PchSerialIoIndexUart2] = PchSerialIoDisabled,
}" }"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref south_xhci on end device ref south_xhci on end

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@@ -149,7 +149,6 @@ chip soc/intel/skylake
# Send an extra VR mailbox command for the PS4 exit issue # Send an extra VR mailbox command for the PS4 exit issue
register "SendVrMbxCmd" = "2" register "SendVrMbxCmd" = "2"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref sa_thermal on end device ref sa_thermal on end

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@@ -150,7 +150,6 @@ chip soc/intel/skylake
[PchSerialIoIndexUart2] = PchSerialIoDisabled, [PchSerialIoIndexUart2] = PchSerialIoDisabled,
}" }"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on device ref igpu on
register "gfx" = "GMA_STATIC_DISPLAYS(0)" register "gfx" = "GMA_STATIC_DISPLAYS(0)"

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@@ -46,8 +46,6 @@ chip soc/intel/skylake
LPC_IOE_EC_62_66" LPC_IOE_EC_62_66"
# Actual device tree. # Actual device tree.
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref igpu on end device ref igpu on end
device ref sa_thermal on end device ref sa_thermal on end

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@@ -26,7 +26,6 @@ chip soc/intel/skylake
register "PmConfigSlpSusMinAssert" = "SLP_SUS_MIN_ASSERT_4S" register "PmConfigSlpSusMinAssert" = "SLP_SUS_MIN_ASSERT_4S"
register "PmConfigSlpAMinAssert" = "SLP_A_MIN_ASSERT_2S" register "PmConfigSlpAMinAssert" = "SLP_A_MIN_ASSERT_2S"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref sa_thermal on end device ref sa_thermal on end
device ref south_xhci on end device ref south_xhci on end

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@@ -105,8 +105,6 @@ chip soc/intel/skylake
.dc_loadline = 310, .dc_loadline = 310,
}" }"
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
device ref system_agent on end device ref system_agent on end
device ref igpu on end device ref igpu on end

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@@ -1,4 +1,5 @@
chip soc/intel/skylake chip soc/intel/skylake
device cpu_cluster 0 on end
device domain 0 on device domain 0 on
ops pci_domain_ops ops pci_domain_ops
device gpio 0 alias pch_gpio on ops block_gpio_ops end device gpio 0 alias pch_gpio on ops block_gpio_ops end