skl mainboards: Move cpu_cluster device to chipset devicetree
Change-Id: I7114612e686a0bf3cfc241f45fa62077fad16f5a Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
@@ -100,7 +100,6 @@ chip soc/intel/skylake
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# Send an extra VR mailbox command for the PS4 exit issue
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register "SendVrMbxCmd" = "2"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref sa_thermal on end
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@@ -32,7 +32,6 @@ chip soc/intel/skylake
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[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
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}"
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device cpu_cluster 0 on end
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device domain 0 on
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subsystemid 0x1025 0x1037 inherit
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device ref system_agent on
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@@ -41,7 +41,6 @@ chip soc/intel/skylake
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# Send an extra VR mailbox command for the PS4 exit issue
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register "SendVrMbxCmd" = "2"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref system_agent on
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subsystemid 0x1849 0x191f
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@@ -35,7 +35,6 @@ chip soc/intel/skylake
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[PchSerialIoIndexUart2] = PchSerialIoSkipInit, // LPSS UART
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}"
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device cpu_cluster 0 on end
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device domain 0 on
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subsystemid 0x1558 0x1313 inherit
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device ref system_agent on end
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@@ -214,7 +214,6 @@ chip soc/intel/skylake
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[PchSerialIoIndexUart2] = PchSerialIoDisabled,
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}"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref sa_thermal on end
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@@ -228,7 +228,6 @@ chip soc/intel/skylake
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}"
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register "tcc_offset" = "10"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref sa_thermal on end
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@@ -305,7 +305,6 @@ chip soc/intel/skylake
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}"
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register "tcc_offset" = "6" # TCC of 94C
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref sa_thermal on end
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@@ -81,7 +81,6 @@ chip soc/intel/skylake
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# Send an extra VR mailbox command for the PS4 exit issue
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register "SendVrMbxCmd" = "2"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref sa_thermal on end
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@@ -227,7 +227,6 @@ chip soc/intel/skylake
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[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
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}"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref system_agent on end
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device ref igpu on end
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@@ -249,7 +249,6 @@ chip soc/intel/skylake
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# Use default SD card detect GPIO configuration
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register "sdcard_cd_gpio" = "GPP_E15"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref system_agent on end
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device ref igpu on end
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@@ -273,7 +273,6 @@ chip soc/intel/skylake
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.psys_pmax = 101,
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}"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref system_agent on end
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device ref igpu on end
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@@ -280,7 +280,6 @@ chip soc/intel/skylake
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# Use default SD card detect GPIO configuration
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register "sdcard_cd_gpio" = "GPP_E15"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref system_agent on end
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device ref igpu on end
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@@ -244,7 +244,6 @@ chip soc/intel/skylake
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[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
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}"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref system_agent on end
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device ref igpu on end
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@@ -230,7 +230,6 @@ chip soc/intel/skylake
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# Use default SD card detect GPIO configuration
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register "sdcard_cd_gpio" = "GPP_E15"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref system_agent on end
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device ref igpu on end
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@@ -259,7 +259,6 @@ chip soc/intel/skylake
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# Use default SD card detect GPIO configuration
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register "sdcard_cd_gpio" = "GPP_E15"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref system_agent on end
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device ref igpu on end
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@@ -7,7 +7,6 @@ chip soc/intel/skylake
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register "eist_enable" = "1"
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device cpu_cluster 0 on end
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device domain 0 on
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subsystemid 0x103c 0x2b5e inherit
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device ref peg0 on end
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@@ -109,7 +109,6 @@ chip soc/intel/skylake
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# Send an extra VR mailbox command for the PS4 exit issue
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register "SendVrMbxCmd" = "2"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref sa_thermal on end
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@@ -153,7 +153,6 @@ chip soc/intel/skylake
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# Use default SD card detect GPIO configuration
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register "sdcard_cd_gpio" = "GPP_G5"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref i2c2 off end
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device ref i2c3 off end
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@@ -161,7 +161,6 @@ chip soc/intel/skylake
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# Use default SD card detect GPIO configuration
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register "sdcard_cd_gpio" = "GPP_A7"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref sa_thermal on end
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@@ -196,7 +196,6 @@ chip soc/intel/skylake
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# Use default SD card detect GPIO configuration
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#register "sdcard_cd_gpio" = "GPP_A7"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref south_xhci on end
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@@ -63,8 +63,6 @@ chip soc/intel/skylake
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# Send an extra VR mailbox command for the PS4 exit issue
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register "SendVrMbxCmd" = "2"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref gmm on end
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@@ -117,7 +117,6 @@ chip soc/intel/skylake
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# Send an extra VR mailbox command for the PS4 exit issue
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register "SendVrMbxCmd" = "2"
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device cpu_cluster 0 on end
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device domain 0 on
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subsystemid 0x17aa 0x30d0 inherit
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device ref igpu on
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@@ -3,7 +3,6 @@
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chip soc/intel/skylake
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register "eist_enable" = "true"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref peg0 on # PCIE16X
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# These configurations are technically for PCIe root
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@@ -159,7 +159,6 @@ chip soc/intel/skylake
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# Send an extra VR mailbox command for the PS4 exit issue
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register "SendVrMbxCmd" = "2"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref sa_thermal on end
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@@ -189,7 +189,6 @@ chip soc/intel/skylake
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[PchSerialIoIndexUart2] = PchSerialIoDisabled,
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}"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref south_xhci on end
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@@ -149,7 +149,6 @@ chip soc/intel/skylake
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# Send an extra VR mailbox command for the PS4 exit issue
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register "SendVrMbxCmd" = "2"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref sa_thermal on end
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@@ -150,7 +150,6 @@ chip soc/intel/skylake
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[PchSerialIoIndexUart2] = PchSerialIoDisabled,
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}"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on
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register "gfx" = "GMA_STATIC_DISPLAYS(0)"
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@@ -46,8 +46,6 @@ chip soc/intel/skylake
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LPC_IOE_EC_62_66"
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# Actual device tree.
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device cpu_cluster 0 on end
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device domain 0 on
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device ref igpu on end
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device ref sa_thermal on end
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@@ -26,7 +26,6 @@ chip soc/intel/skylake
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register "PmConfigSlpSusMinAssert" = "SLP_SUS_MIN_ASSERT_4S"
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register "PmConfigSlpAMinAssert" = "SLP_A_MIN_ASSERT_2S"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref sa_thermal on end
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device ref south_xhci on end
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@@ -105,8 +105,6 @@ chip soc/intel/skylake
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.dc_loadline = 310,
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}"
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device cpu_cluster 0 on end
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device domain 0 on
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device ref system_agent on end
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device ref igpu on end
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@@ -1,4 +1,5 @@
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chip soc/intel/skylake
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device cpu_cluster 0 on end
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device domain 0 on
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ops pci_domain_ops
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device gpio 0 alias pch_gpio on ops block_gpio_ops end
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