soc/intel/alderlake: Send End-of-Post message to CSE
This is done to ensure the CSE will not execute any pre-boot commands after it receives this command. Verified EOP and error recovery sequence from Intel doc#627331. TEST=on brya, autotest firmware_CheckEOPState confirms ME is in post-boot state Change-Id: Iee8c29f81d5d04852ae3f16dc8a9ff0fa59f056a Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55596 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@@ -75,6 +75,7 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_FSP_RESET
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select SOC_INTEL_COMMON_PCH_BASE
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select SOC_INTEL_COMMON_RESET
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select SOC_INTEL_CSE_SET_EOP
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select SSE2
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select SUPPORT_CPU_UCODE_IN_CBFS
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select TSC_MONOTONIC_TIMER
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