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remove more unused code

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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2188 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Li-Ta Lo
2006-02-28 23:07:27 +00:00
parent b2528aa653
commit c0fe3190c4
2 changed files with 19 additions and 21 deletions
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13
src/mainboard/amd/rumba/auto.c
View File

@@ -24,7 +24,7 @@
static void msr_init(void)
{
__builtin_wrmsr(0x1808, 0x22fffc02, 0x10f3bf00);
__builtin_wrmsr(0x1808, 0x10f3bf00, 0x22fffc02);
__builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
__builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
@@ -48,16 +48,6 @@ static void msr_init(void)
__builtin_wrmsr(0xa0002001, 0x86002, 0x0);
__builtin_wrmsr(0x50002001, 0x27, 0x0);
__builtin_wrmsr(0x4c002001, 0x1, 0x0);
__builtin_wrmsr(0x20000018, 0x3400, 0x10076013);
__builtin_wrmsr(0x20000019, 0x696332a3, 0x18000008);
__builtin_wrmsr(0x2000001a, 0x101, 0x0);
__builtin_wrmsr(0x2000001c, 0xff00ff, 0x0);
__builtin_wrmsr(0x2000001d, 0x0, 0x0);
__builtin_wrmsr(0x2000001f, 0x0, 0x0);
__builtin_wrmsr(0x20000020, 0x6, 0x0);
}
static void pll_reset(void)
@@ -107,6 +97,7 @@ static void main(unsigned long bist)
print_err("hi\n\r");
pll_reset();
msr_init();
/* Halt if there was a built in self test failure */
//report_bist_failure(bist);

27
src/northbridge/amd/gx2/raminit.c
View File

@@ -32,7 +32,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
/* 2. release from PMode */
msr = rdmsr(0x20002004);
msr.lo &= !0x04;
msr.lo |= 0x01;
msr.lo |= 0x03;
wrmsr(0x20002004, msr);
/* undocmented bits in GX, in LX there are
* 8 bits in PM1_UP_DLY */
@@ -48,6 +48,15 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
wrmsr(0x2000201d, msr);
print_debug("sdram_enable step 3\r\n");
/* 4. set and clear REF_TST 16 times, more shouldn't hurt */
for (i = 0; i < 19; i++) {
msr = rdmsr(0x20000018);
msr.lo |= (0x01 << 3);
wrmsr(0x20000018, msr);
msr.lo &= !(0x01 << 3);
wrmsr(0x20000018, msr);
}
print_debug("sdram_enable step 4\r\n");
/* 5. set refresh interval */
msr = rdmsr(0x20000018);
@@ -86,15 +95,6 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
wrmsr(0x20000018, msr);
print_debug("sdram_enable step 10\r\n");
/* 4. set and clear REF_TST 16 times, more shouldn't hurt */
for (i = 0; i < 19; i++) {
msr = rdmsr(0x20000018);
msr.lo |= (0x01 << 3);
wrmsr(0x20000018, msr);
msr.lo &= !(0x01 << 3);
wrmsr(0x20000018, msr);
}
print_debug("sdram_enable step 4\r\n");
/* wait 200 SDCLKs */
for (i = 0; i < 200; i++)
@@ -103,9 +103,16 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
/* load RDSYNC */
msr = rdmsr(0x2000001f);
msr.hi = 0x000ff310;
msr.lo = 0x00000000;
wrmsr(0x2000001f, msr);
print_debug("sdram_enable step 10\r\n");
/* set delay control */
msr = rdmsr(0x4c00000f);
msr.hi = 0x830d415f;
msr.lo = 0x8ea0ad6f;
wrmsr(0x4c00000f, msr);
/* DRAM working now?? */
}