amd/pi: Add AgesaHeapRebase callout
Implement an optional callout for AgesaHeapRebase which allows AGESA to override any internal hardcoded heap addresses. Designate a region in CAR that may be used for pre-mem heap and return that address before DRAM is configured. After DRAM is up, the address in cbmem is returned. TEST=Boot grunt with patchstack and experimental blob BUG=b:74518368 Change-Id: Ieda202a6064302b21707bd7ddfabc132cd85ed45 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/25458 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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Martin Roth
parent
10b52e0f22
commit
c150a57d29
@ -34,6 +34,7 @@ typedef struct _BIOS_BUFFER_NODE {
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} BIOS_BUFFER_NODE;
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} BIOS_BUFFER_NODE;
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AGESA_STATUS agesa_GetTempHeapBase(UINT32 Func, UINTN Data, VOID *ConfigPtr);
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AGESA_STATUS agesa_GetTempHeapBase(UINT32 Func, UINTN Data, VOID *ConfigPtr);
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AGESA_STATUS agesa_HeapRebase(UINT32 Func, UINTN Data, VOID *ConfigPtr);
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AGESA_STATUS agesa_AllocateBuffer(UINT32 Func, UINTN Data, VOID *ConfigPtr);
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AGESA_STATUS agesa_AllocateBuffer(UINT32 Func, UINTN Data, VOID *ConfigPtr);
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AGESA_STATUS agesa_DeallocateBuffer(UINT32 Func, UINTN Data, VOID *ConfigPtr);
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AGESA_STATUS agesa_DeallocateBuffer(UINT32 Func, UINTN Data, VOID *ConfigPtr);
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@ -7,6 +7,14 @@ config SOC_AMD_COMMON_BLOCK_PI
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if SOC_AMD_COMMON_BLOCK_PI
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if SOC_AMD_COMMON_BLOCK_PI
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config PI_AGESA_CAR_HEAP_BASE
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hex
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default 0x400000
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help
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The AGESA PI blob may be built to allow an optional callout for
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AgesaHeapRebase. If AGESA calls AgesaHeapRebase, this option
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determines the location of the heap prior to DRAM availability.
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config PI_AGESA_TEMP_RAM_BASE
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config PI_AGESA_TEMP_RAM_BASE
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hex
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hex
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default 0x100000
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default 0x100000
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@ -31,6 +31,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = {
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{ AGESA_DO_RESET, agesa_Reset },
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{ AGESA_DO_RESET, agesa_Reset },
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{ AGESA_FCH_OEM_CALLOUT, agesa_fch_initreset },
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{ AGESA_FCH_OEM_CALLOUT, agesa_fch_initreset },
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{ AGESA_HALT_THIS_AP, agesa_HaltThisAp },
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{ AGESA_HALT_THIS_AP, agesa_HaltThisAp },
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{ AGESA_HEAP_REBASE, agesa_HeapRebase },
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{ AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl }
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{ AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl }
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};
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};
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#else
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#else
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@ -46,6 +47,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = {
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{ AGESA_READ_SPD, agesa_ReadSpd },
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{ AGESA_READ_SPD, agesa_ReadSpd },
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{ AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl },
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{ AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl },
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{ AGESA_GET_TEMP_HEAP_BASE, agesa_GetTempHeapBase },
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{ AGESA_GET_TEMP_HEAP_BASE, agesa_GetTempHeapBase },
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{ AGESA_HEAP_REBASE, agesa_HeapRebase },
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#if ENV_RAMSTAGE
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#if ENV_RAMSTAGE
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{ AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
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{ AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
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{ AGESA_RUNFUNC_ON_ALL_APS, agesa_RunFcnOnAllAps },
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{ AGESA_RUNFUNC_ON_ALL_APS, agesa_RunFcnOnAllAps },
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@ -55,6 +55,39 @@ AGESA_STATUS agesa_GetTempHeapBase(UINT32 Func, UINTN Data, VOID *ConfigPtr)
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return AGESA_SUCCESS;
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return AGESA_SUCCESS;
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}
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}
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/*
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* Name agesa_HeapRebase
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* Brief description AGESA may use internal hardcoded locations for its
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* heap. Modern implementations allow the base to be
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* overridden by calling agesa_HeapRebase.
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* Input parameters
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* Func Unused
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* Data Unused
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* ConfigPtr Pointer to type AGESA_REBASE_PARAMS
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* Output parameters
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* Status Indicates whether HeapAddress was successfully
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* set.
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*/
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AGESA_STATUS agesa_HeapRebase(UINT32 Func, UINTN Data, VOID *ConfigPtr)
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{
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AGESA_REBASE_PARAMS *Rebase;
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Rebase = (AGESA_REBASE_PARAMS *)ConfigPtr;
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if (ENV_BOOTBLOCK) {
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Rebase->HeapAddress = CONFIG_PI_AGESA_CAR_HEAP_BASE;
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} else {
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/*
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* todo: remove the if() above and keep the assignment here
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* once all AGESA functions are removed from bootblock.
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*/
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Rebase->HeapAddress = (UINTN)agesa_heap_base();
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if (!Rebase->HeapAddress)
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Rebase->HeapAddress = CONFIG_PI_AGESA_CAR_HEAP_BASE;
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}
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return AGESA_SUCCESS;
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}
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/*
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/*
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* Name FindAllocatedNode
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* Name FindAllocatedNode
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* Brief description Find an allocated node that matches the handle.
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* Brief description Find an allocated node that matches the handle.
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