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code cleanup, comments added

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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2284 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Li-Ta Lo
2006-04-27 18:40:15 +00:00
parent b947b14734
commit c1a4b2b0e5
8 changed files with 156 additions and 162 deletions
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10
src/include/cpu/amd/gx2def.h
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@@ -469,18 +469,18 @@
/* This is chip specific!*/
#define MSR_GLIU0_BASE1 (MSR_GLIU0 + 0x20) /* BM*/
#define MSR_GLIU0_BASE2 (MSR_GLIU0 + 0x21) /* BM*/
#define MSR_GLIU0_SHADOW (MSR_GLIU0 + 0x2C) /* SCO should only be SC*/
#define MSR_GLIU0_SYSMEM (MSR_GLIU0 + 0x28) /* RO should only be R*/
#define MSR_GLIU0_SHADOW (MSR_GLIU0 + 0x2C) /* SCO should only be SC*/
#define MSR_GLIU0_SYSMEM (MSR_GLIU0 + 0x28) /* RO should only be R*/
#define MSR_GLIU0_SMM (MSR_GLIU0 + 0x26) /* BMO*/
#define MSR_GLIU0_DMM (MSR_GLIU0 + 0x27) /* BMO*/
#define MSR_GLIU1_BASE1 (MSR_GLIU1 + 0x20) /* BM*/
#define MSR_GLIU1_BASE2 (MSR_GLIU1 + 0x21) /* BM*/
#define MSR_GLIU1_SHADOW (MSR_GLIU1 + 0x2D) /* SCO should only be SC*/
#define MSR_GLIU1_SYSMEM (MSR_GLIU1 + 0x29) /* RO should only be R*/
#define MSR_GLIU1_SHADOW (MSR_GLIU1 + 0x2D) /* SCO should only be SC*/
#define MSR_GLIU1_SYSMEM (MSR_GLIU1 + 0x29) /* RO should only be R*/
#define MSR_GLIU1_SMM (MSR_GLIU1 + 0x23) /* BM*/
#define MSR_GLIU1_DMM (MSR_GLIU1 + 0x24) /* BM*/
#define MSR_GLIU1_FPU_TRAP (MSR_GLIU1 + 0x0E3) /* FooGlue F0 for FPU*/
#define MSR_GLIU1_FPU_TRAP (MSR_GLIU1 + 0x0E3) /* FooGlue F0 for FPU*/
/* definitions that are "once you are mostly up, start VSA" type things */
#define SMM_OFFSET 0x40400000