cpu/x86/pae/pgtbl: Add memset with PAE

To clear all DRAM on x86_32, add a new method that uses PAE to access
more than 32bit of address space.
Add Documentation as well.

Required for clearing all system memory as part of security API.

Tested on wedge100s:
 Takes less than 2 seconds to clear 8GiB of DRAM.
Tested on P8H61M-Pro:
 Takes less than 1 second to clear 4GiB of DRAM.

Change-Id: I00f7ecf87b5c9227a9d58a0b61eecc38007e1a57
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31549
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

Documentation/arch/x86/index.md

@@ -2,6 +2,8 @@
 
 This section contains documentation about coreboot on x86 architecture.
 
+* [x86 PAE support](pae.md)
+
 ## State of x86_64 support
 At the moment there's no single board that supports x86_64 or to be exact
 `ARCH_RAMSTAGE_X86_64` and `ARCH_ROMSTAGE_X86_64`.

Documentation/arch/x86/pae.md

@@ -0,0 +1,15 @@
+# x86_32 PAE documentation
+
+Due to missing x86_64 support it's required to use PAE enabled x86_32 code.
+The corresponding functions can be found in ``src/cpu/x86/pae/``.
+
+## Memory clearing helper functions
+
+To clear all DRAM on request of the
+[Security API](../../security/memory_clearing.md), a helper function can be used
+called `memset_pae`.
+The function has additional requirements in contrast to `memset`, and has more
+overhead as it uses virtual memory to access memory above 4GiB.
+Memory is cleared in 2MiB chunks, which might take a while.
+
+Make sure to enable caches through MTRRs, otherwise `memset_pae` will be slow!

Documentation/security/memory_clearing.md

@@ -42,3 +42,7 @@ Without MTRRs (and caches enabled) clearing memory takes multiple seconds.
 
 As some platforms place code and stack in DRAM (FSP1.0), the regions can be
 skipped.
+
+## Architecture specific implementations
+
+* [x86 PAE](../arch/x86/pae.md)