src/mainboard/emulation/qemu-power9/*: add QEMU POWER9 mainboard

Add initial implementation for booting on QEMU POWER9 emulation.

Change-Id: I079c5b9ad564024dd13296ef75c263bdc40c9d39
Signed-off-by: Yaroslav Kurlaev <yaroslav.kurlaev@3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57079
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Yaroslav Kurlaev
2021-07-02 14:34:00 +07:00
committed by Felix Held
parent d495456429
commit c1de9e88e7
11 changed files with 146 additions and 0 deletions

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## SPDX-License-Identifier: GPL-2.0-only
# To execute, do:
# qemu-system-ppc64 -M powernv --cpu power9 --bios 'build/coreboot.rom'
if BOARD_EMULATION_QEMU_POWER9
config BOARD_SPECIFIC_OPTIONS
def_bool y
select CPU_POWER9
select BOARD_ROMSIZE_KB_512
select ARCH_BOOTBLOCK_PPC64
select ARCH_VERSTAGE_PPC64
select ARCH_ROMSTAGE_PPC64
select ARCH_RAMSTAGE_PPC64
select BOOT_DEVICE_NOT_SPI_FLASH
select MISSING_BOARD_RESET
config MEMLAYOUT_LD_FILE
string
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/memlayout.ld"
config MAINBOARD_DIR
string
default "emulation/qemu-power9"
config MAINBOARD_PART_NUMBER
string
default "QEMU POWER9"
config MAX_CPUS
int
default 1
config MAINBOARD_VENDOR
string
default "Emulation"
config DRAM_SIZE_MB
int
default 32768
endif # BOARD_EMULATION_QEMU_POWER9

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config BOARD_EMULATION_QEMU_POWER9
bool "QEMU power9"

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## SPDX-License-Identifier: GPL-2.0-only
romstage-y += cbmem.c
romstage-y += romstage.c

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Board name: QEMU POWER9
Category: emulation

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/* SPDX-License-Identifier: GPL-2.0-only */
#include <cbmem.h>
void *cbmem_top_chipset(void)
{
/* Top of cbmem is at lowest usable DRAM address below 4GiB. */
/* For now, last 1M of 4G */
void *ptr = (void *) (4ULL * GiB - 1 * MiB);
return ptr;
}

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## SPDX-License-Identifier: GPL-2.0-only
chip cpu/power9
device cpu_cluster 0 on end
end

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/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
#include <device/device.h>
#include <cbmem.h>
static void mainboard_enable(struct device *dev)
{
if (!dev)
die("No dev0; die\n");
}
struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
};

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/* SPDX-License-Identifier: GPL-2.0-only */
#include <memlayout.h>
#include <arch/header.ld>
SECTIONS
{
DRAM_START(0x0)
BOOTBLOCK(0, 32K)
STACK(0x8000, 32K)
PRERAM_CBMEM_CONSOLE(0x10000, 128K)
FMAP_CACHE(0x30000, 4K)
CBFS_MCACHE(0x31000, 8K)
TIMESTAMP(0x33000, 4K)
CBFS_CACHE(0x34000, 512K)
ROMSTAGE(0x100000, 1M)
RAMSTAGE(0x300000, 5M)
}

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/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
#include <program_loading.h>
void main(void)
{
console_init();
run_ramstage();
}