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src: Update bare access to BOOL CONFIG_ vals to CONFIG()

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BOOL type Kconfig values should be used through the CONFIG() macro.
These instances were not, so update them.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ie4706d82c12c487607bbf5ad8059922e0e586858
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Martin Roth
2020-07-24 12:26:21 -06:00
committed by Patrick Georgi
parent f48acbda7b
commit c25c1ebd9e
8 changed files with 15 additions and 15 deletions
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4
src/soc/intel/skylake/chip.c
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@ -223,7 +223,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
memset(params->PcieRpPmSci, 0, sizeof(params->PcieRpPmSci));
/* Legacy 8254 timer support */
params->Early8254ClockGatingEnable = !CONFIG_USE_LEGACY_8254_TIMER;
params->Early8254ClockGatingEnable = !CONFIG(USE_LEGACY_8254_TIMER);
memcpy(params->SerialIoDevMode, config->SerialIoDevMode,
sizeof(params->SerialIoDevMode));
@ -328,7 +328,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->PchSirqEnable = config->serirq_mode != SERIRQ_OFF;
params->PchSirqMode = config->serirq_mode == SERIRQ_CONTINUOUS;
params->CpuConfig.Bits.SkipMpInit = !CONFIG_USE_INTEL_FSP_MP_INIT;
params->CpuConfig.Bits.SkipMpInit = !CONFIG(USE_INTEL_FSP_MP_INIT);
for (i = 0; i < ARRAY_SIZE(config->i2c_voltage); i++)
params->SerialIoI2cVoltage[i] = config->i2c_voltage[i];