arch/x86/ioapic: Select IOAPIC with SMP
For coreboot proper, I/O APIC programming is not really required, except for the APIC ID field. We generally do not guard the related set_ioapic_id() or setup_ioapic() calls with CONFIG(IOAPIC). In practice it's something one cannot leave unselected, but maintain the Kconfig for the time being. Change-Id: I6e83efafcf6e81d1dfd433fab1e89024d984cc1f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55291 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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Felix Held
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4bab5691cc
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c25ecb5443
@@ -10,7 +10,6 @@ if SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE
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config SOUTHBRIDGE_SPECIFIC_OPTIONS
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def_bool y
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select IOAPIC
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_CF9_RESET
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select HAVE_CF9_RESET_PREPARE
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@@ -3,7 +3,6 @@
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config SOUTHBRIDGE_AMD_CIMX_SB800
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bool
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default n
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select IOAPIC
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select HAVE_USBDEBUG_OPTIONS
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select AMD_SB_CIMX
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select HAVE_CF9_RESET
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@@ -10,7 +10,6 @@ if SOUTHBRIDGE_AMD_PI_AVALON || SOUTHBRIDGE_AMD_PI_KERN
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config SOUTHBRIDGE_SPECIFIC_OPTIONS
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def_bool y
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select IOAPIC
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_CF9_RESET
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select HAVE_CF9_RESET_PREPARE
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@@ -23,7 +23,6 @@ config SOUTH_BRIDGE_OPTIONS
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select SOUTHBRIDGE_INTEL_COMMON_RTC
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select SOUTHBRIDGE_INTEL_COMMON_RESET
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select IOAPIC
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_SMI_HANDLER
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select USE_WATCHDOG_ON_BOOT
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@@ -3,7 +3,6 @@
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config SOUTHBRIDGE_INTEL_I82801DX
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bool
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select IOAPIC
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select HAVE_SMI_HANDLER
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select SOUTHBRIDGE_INTEL_COMMON_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
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@@ -5,7 +5,6 @@ config SOUTHBRIDGE_INTEL_I82801GX
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select ACPI_SOC_NVS
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select AZALIA_PLUGIN_SUPPORT
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select IOAPIC
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select USE_WATCHDOG_ON_BOOT
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select HAVE_SMI_HANDLER
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select SOUTHBRIDGE_INTEL_COMMON_GPIO
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@@ -8,7 +8,6 @@ config SOUTHBRIDGE_INTEL_I82801IX
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select HAVE_SMI_HANDLER if !NO_SMM
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select HAVE_USBDEBUG_OPTIONS
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select IOAPIC
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select SOUTHBRIDGE_INTEL_COMMON_GPIO
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
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@@ -9,7 +9,6 @@ config SOUTHBRIDGE_INTEL_I82801JX
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select HAVE_SMI_HANDLER
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select HAVE_USBDEBUG_OPTIONS
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select IOAPIC
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select SOUTHBRIDGE_INTEL_COMMON_GPIO
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
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@@ -9,7 +9,6 @@ config SOUTH_BRIDGE_OPTIONS
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def_bool y
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select AZALIA_PLUGIN_SUPPORT
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select IOAPIC
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select HAVE_SMI_HANDLER
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select USE_WATCHDOG_ON_BOOT
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select PCIEXP_ASPM
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@@ -19,7 +19,6 @@ config SOUTH_BRIDGE_OPTIONS
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select SOUTHBRIDGE_INTEL_COMMON_RTC
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select SOUTHBRIDGE_INTEL_COMMON_RESET
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select IOAPIC
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select HAVE_SMI_HANDLER
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select HAVE_USBDEBUG_OPTIONS
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select USE_WATCHDOG_ON_BOOT
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