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vendorcode/amd/pi/00670F00: Remove functions that use LibAmdMemRMW()

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The functions that use LibAmdMemRMW() are not used by coreboot and can be
safely removed in preparation to remove LibAmdMemRMW()  itself. The
functions to be removed are: ProgramFchAcpiMmioTbl() and GetEfuseStatus(),
both from vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchPeLib.c.

BUG=b:112541697
TEST=Build grunt and gardenia

Change-Id: Ib935b1797c4bf8b504fdda6f676fca369169a7f1
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/28081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Richard Spiegel 2018-08-13 19:03:38 -07:00 committed by Martin Roth
parent ea6a3c7d24
commit c26c93887a
2 changed files with 0 additions and 65 deletions
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2
src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h
View File

@ -57,7 +57,6 @@ VOID ReadPci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AM
VOID WritePci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader); VOID WritePci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
VOID RwPci (IN UINT32 Address, IN UINT8 OpFlag, IN UINT32 Mask, IN UINT32 Data, IN AMD_CONFIG_PARAMS *StdHeader); VOID RwPci (IN UINT32 Address, IN UINT8 OpFlag, IN UINT32 Mask, IN UINT32 Data, IN AMD_CONFIG_PARAMS *StdHeader);
VOID ProgramPciByteTable (IN REG8_MASK* pPciByteTable, IN UINT16 dwTableSize, IN AMD_CONFIG_PARAMS *StdHeader); VOID ProgramPciByteTable (IN REG8_MASK* pPciByteTable, IN UINT16 dwTableSize, IN AMD_CONFIG_PARAMS *StdHeader);
VOID ProgramFchAcpiMmioTbl (IN ACPI_REG_WRITE *pAcpiTbl, IN AMD_CONFIG_PARAMS *StdHeader);
VOID ProgramFchSciMapTbl (IN SCI_MAP_CONTROL *pSciMapTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock); VOID ProgramFchSciMapTbl (IN SCI_MAP_CONTROL *pSciMapTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);
VOID ProgramFchGpioTbl (IN GPIO_CONTROL *pGpioTbl); VOID ProgramFchGpioTbl (IN GPIO_CONTROL *pGpioTbl);
VOID ProgramFchSataPhyTbl (IN SATA_PHY_CONTROL *pSataPhyTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock); VOID ProgramFchSataPhyTbl (IN SATA_PHY_CONTROL *pSataPhyTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);
@ -343,7 +342,6 @@ VOID CimFchStall (IN UINT32 uSec, IN AMD_CONFIG_PARAMS *StdHeader);
VOID FchPciReset (IN AMD_CONFIG_PARAMS *StdHeader); VOID FchPciReset (IN AMD_CONFIG_PARAMS *StdHeader);
VOID OutPort80 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader); VOID OutPort80 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader);
VOID OutPort1080 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader); VOID OutPort1080 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader);
VOID GetEfuseStatus (IN VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);
VOID TurnOffCG2 (OUT VOID); VOID TurnOffCG2 (OUT VOID);
VOID BackUpCG2 (OUT VOID); VOID BackUpCG2 (OUT VOID);
VOID FchCopyMem (IN VOID* pDest, IN VOID* pSource, IN UINTN Length); VOID FchCopyMem (IN VOID* pDest, IN VOID* pSource, IN UINTN Length);

63
src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchPeLib.c
View File

@ -99,42 +99,6 @@ ProgramPciByteTable (
} }
} }
/*----------------------------------------------------------------------------------------*/
/**
* ProgramFchAcpiMmioTbl - Program FCH ACPI MMIO register by table (8 bits data)
*
*
*
* @param[in] pAcpiTbl - Table data pointer
* @param[in] StdHeader
*
*/
VOID
ProgramFchAcpiMmioTbl (
IN ACPI_REG_WRITE *pAcpiTbl,
IN AMD_CONFIG_PARAMS *StdHeader
)
{
UINT8 i;
UINT8 Or8;
UINT8 Mask8;
UINT32 ddtempVar;
if (pAcpiTbl != NULL) {
if ((pAcpiTbl->MmioReg == 0) && (pAcpiTbl->MmioBase == 0) && (pAcpiTbl->DataAndMask == 0xB0) && (pAcpiTbl->DataOrMask == 0xAC)) {
// Signature Checking
pAcpiTbl++;
for ( i = 1; pAcpiTbl->MmioBase < 0x1D; i++ ) {
ddtempVar = ACPI_MMIO_BASE | (pAcpiTbl->MmioBase) << 8 | pAcpiTbl->MmioReg;
Or8 = pAcpiTbl->DataOrMask;
Mask8 = ~pAcpiTbl->DataAndMask;
LibAmdMemRMW (AccessWidth8, (UINT64) ddtempVar, &Or8, &Mask8, StdHeader);
pAcpiTbl++;
}
}
}
}
/*----------------------------------------------------------------------------------------*/ /*----------------------------------------------------------------------------------------*/
/** /**
* ProgramFchSciMapTbl - Program FCH SCI Map table (8 bits data) * ProgramFchSciMapTbl - Program FCH SCI Map table (8 bits data)
@ -263,33 +227,6 @@ IsImcEnabled (
} }
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) #if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/**
* GetEfuseStatue - Get Efuse status
*
*
* @param[in] Value - Return Chip strap status
* @param[in] StdHeader
*
*/
VOID
GetEfuseStatus (
IN VOID *Value,
IN AMD_CONFIG_PARAMS *StdHeader
)
{
UINT8 Or8;
UINT8 Mask8;
Or8 = BIT5;
Mask8 = BIT5;
LibAmdMemRMW (AccessWidth8, (UINT64) (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGC8), &Or8, &Mask8, StdHeader);
LibAmdMemWrite (AccessWidth8, (UINT64) (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGD8), Value, StdHeader);
LibAmdMemRead (AccessWidth8, (UINT64) (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGD8 + 1), Value, StdHeader);
Or8 = 0;
Mask8 = BIT5;
LibAmdMemRMW (AccessWidth8, (UINT64) (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGC8), &Or8, &Mask8, StdHeader);
}
/*----------------------------------------------------------------------------------------*/ /*----------------------------------------------------------------------------------------*/
/** /**
* SbSleepTrapControl - SB Sleep Trap Control * SbSleepTrapControl - SB Sleep Trap Control