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nb/sb/cpu: Drop Intel Rangeley support

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Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.

Change-Id: I41589118579988617677cf48af5401bc35b23e05
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36980
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Arthur Heymans
2019-11-19 18:37:28 +01:00
committed by Kyösti Mälkki
parent 298619f6d9
commit c2c634a089
68 changed files with 2 additions and 9280 deletions
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9
src/southbridge/intel/common/watchdog.c
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@@ -37,13 +37,8 @@ void watchdog_off(void)
value = pci_read_config16(dev, PCI_COMMAND);
if (CONFIG(SOUTHBRIDGE_INTEL_FSP_RANGELEY)) {
/* Enable I/O space. */
value |= PCI_COMMAND_IO;
} else {
/* Disable interrupt. */
value |= PCI_COMMAND_INT_DISABLE;
}
/* Disable interrupt. */
value |= PCI_COMMAND_INT_DISABLE;
pci_write_config16(dev, PCI_COMMAND, value);
/* Disable the watchdog timer. */