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intel/xeon_sp/cpx: Hook up public microcode release

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Change-Id: I7e575cb17e2004bd931f4fa1d05f17c4cdca29ba
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57444
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Arthur Heymans
2021-09-07 11:23:40 +02:00
committed by Felix Held
parent efebedd3fb
commit c2d0a494a3
3 changed files with 4 additions and 2 deletions
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1
src/soc/intel/xeon_sp/cpx/Kconfig
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@@ -4,7 +4,6 @@ if SOC_INTEL_COOPERLAKE_SP
config SOC_SPECIFIC_OPTIONS
def_bool y
select MICROCODE_BLOB_NOT_HOOKED_UP
config FSP_HEADER_PATH
string "Location of FSP headers"

2
src/soc/intel/xeon_sp/cpx/Makefile.inc
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@@ -17,4 +17,6 @@ ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-0b
endif ## CONFIG_SOC_INTEL_COOPERLAKE_SP