switch some ROMCC boards back to ROMCC.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5364 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/drivers/generic/debug/debug_dev.c

@@ -59,7 +59,7 @@ static void print_pci_regs_all(void)
 	}
 }
 
-static void print_cpuid()
+static void print_cpuid(void)
 {
 	msr_t msr;
 	unsigned index;

src/mainboard/msi/ms7135/mptable.c

@@ -47,7 +47,6 @@ static void *smp_write_config_table(void *v)
 	unsigned sbdn;
 
 	int bus_num;
-	int i;
 
 	mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
 	memset(mc, 0, sizeof(*mc));

src/mainboard/tyan/s2735/Kconfig

@@ -15,6 +15,7 @@ config BOARD_TYAN_S2735
 	select USE_DCACHE_RAM
 	select USE_WATCHDOG_ON_BOOT
 	select BOARD_ROMSIZE_KB_512
+	select USE_PRINTK_IN_CAR
 
 config MAINBOARD_DIR
 	string

src/mainboard/via/epia-m/Kconfig

@@ -10,22 +10,13 @@ config BOARD_VIA_EPIA_M
 	select HAVE_PIRQ_TABLE
 	select HAVE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_256
+	select ROMCC
 
 config MAINBOARD_DIR
 	string
 	default via/epia-m
 	depends on BOARD_VIA_EPIA_M
 
-#config DCACHE_RAM_BASE
-#	hex
-#	default 0xffef0000
-#	depends on BOARD_VIA_EPIA_M
-
-#config DCACHE_RAM_SIZE
-#	hex
-#	default 0x8000
-#	depends on BOARD_VIA_EPIA_M
-
 config MAINBOARD_PART_NUMBER
 	string
 	default "EPIA-M"

src/mainboard/via/epia-m700/Kconfig

@@ -7,6 +7,7 @@ config BOARD_VIA_EPIA_M700
 	select BOARD_HAS_FADT
 	select HAVE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_512
+	select USE_PRINTK_IN_CAR
 
 config MAINBOARD_DIR
 	string

src/mainboard/via/epia-n/Kconfig

@@ -18,16 +18,6 @@ config MAINBOARD_DIR
 	default via/epia-n
 	depends on BOARD_VIA_EPIA_N
 
-#config DCACHE_RAM_BASE
-#	hex
-#	default 0xffef0000
-#	depends on BOARD_VIA_EPIA_N
-#
-#config DCACHE_RAM_SIZE
-#	hex
-#	default 0x8000
-#	depends on BOARD_VIA_EPIA_N
-
 config MAINBOARD_PART_NUMBER
 	string
 	default "EPIA-N"

src/mainboard/via/epia/Kconfig

@@ -7,22 +7,13 @@ config BOARD_VIA_EPIA
 	select SUPERIO_WINBOND_W83627HF
 	select HAVE_PIRQ_TABLE
 	select BOARD_ROMSIZE_KB_256
+	select ROMCC
 
 config MAINBOARD_DIR
 	string
 	default via/epia
 	depends on BOARD_VIA_EPIA
 
-#config DCACHE_RAM_BASE
-#	hex
-#	default 0xffef0000
-#	depends on BOARD_VIA_EPIA
-#
-#config DCACHE_RAM_SIZE
-#	hex
-#	default 0x8000
-#	depends on BOARD_VIA_EPIA
-
 config MAINBOARD_PART_NUMBER
 	string
 	default "EPIA"

src/southbridge/intel/esb6300/esb6300_bridge1c.c

@@ -7,9 +7,6 @@
 
 static void bridge1c_init(struct device *dev)
 {
-
-	uint16_t word;
-
 	/* configuration */
 	pci_write_config8(dev, 0x1b, 0x30);
 //	pci_write_config8(dev, 0x3e, 0x07);
@@ -31,7 +28,6 @@ static void bridge1c_init(struct device *dev)
 
 	/* multi transaction timer */
 	pci_write_config8(dev, 0x42, 0x08);
-
 }
 
 static struct device_operations pci_ops  = {

src/southbridge/intel/esb6300/esb6300_ide.c

@@ -9,7 +9,6 @@ static void ide_init(struct device *dev)
 {
 
 	/* Enable ide devices so the linux ide driver will work */
-	uint16_t word;
 
 	/* Enable IDE devices */
         pci_write_config16(dev, 0x40, 0x0a307);
@@ -19,6 +18,7 @@ static void ide_init(struct device *dev)
         pci_write_config16(dev, 0x54, 0x5055);
  
 #if 0
+	uint16_t word;
 	word = pci_read_config16(dev, 0x40);
 	word |= (1 << 15);
 	pci_write_config16(dev, 0x40, word);

src/southbridge/intel/esb6300/esb6300_lpc.c

@@ -51,13 +51,13 @@ static void set_esb6300_gpio_use_sel(
 	device_t dev, struct resource *res, config_t *config)
 {
 	uint32_t gpio_use_sel, gpio_use_sel2;
-	int i;
 
 //	gpio_use_sel  = 0x1B003100;
 //	gpio_use_sel2 = 0x03000000;
 	gpio_use_sel  = 0x1BBC31C0;
 	gpio_use_sel2 = 0x03000FE1;
 #if 0
+	int i;
 	for(i = 0; i < 64; i++) {
 		int val;
 		switch(config->gpio[i] & ESB6300_GPIO_USE_MASK) {
@@ -84,13 +84,13 @@ static void set_esb6300_gpio_direction(
 	device_t dev, struct resource *res, config_t *config)
 {
 	uint32_t gpio_io_sel, gpio_io_sel2;
-	int i;
 
 //	gpio_io_sel  = 0x0000ffff;
 //	gpio_io_sel2 = 0x00000000;
 	gpio_io_sel  = 0x1900ffff;
 	gpio_io_sel2 = 0x00000fe1;
 #if 0
+	int i;
 	for(i = 0; i < 64; i++) {
 		int val;
 		switch(config->gpio[i] & ESB6300_GPIO_SEL_MASK) {
@@ -118,7 +118,6 @@ static void set_esb6300_gpio_level(
 {
 	uint32_t gpio_lvl, gpio_lvl2;
 	uint32_t gpio_blink;
-	int i;
 
 //	gpio_lvl   = 0x1b3f0000;
 //	gpio_blink = 0x00040000;
@@ -127,6 +126,7 @@ static void set_esb6300_gpio_level(
 	gpio_blink = 0x00000000;
 	gpio_lvl2  = 0x00000fff;
 #if 0
+	int i;
 	for(i = 0; i < 64; i++) {
 		int val, blink;
 		switch(config->gpio[i] & ESB6300_GPIO_LVL_MASK) {
@@ -157,10 +157,10 @@ static void set_esb6300_gpio_inv(
 	device_t dev, struct resource *res, config_t *config)
 {
 	uint32_t gpio_inv;
-	int i;
 
 	gpio_inv   = 0x00003100;
 #if 0
+	int i;
 	for(i = 0; i < 32; i++) {
 		int val;
 		switch(config->gpio[i] & ESB6300_GPIO_INV_MASK) {

src/southbridge/intel/esb6300/esb6300_sata.c

@@ -7,9 +7,7 @@
 
 static void sata_init(struct device *dev)
 {
-
 	/* Enable sata devices so the linux sata driver will work */
-	uint16_t word;
 
 	/* Enable SATA devices */
 

src/southbridge/via/vt8235/vt8235_early_serial.c

@@ -38,9 +38,6 @@ static void vt8235_writesioword(uint16_t reg, uint16_t val)
 
 static void enable_vt8235_serial(void) 
 {
-	unsigned long x;
-	uint8_t c;
-	device_t dev;
 	// turn on pnp
 	vt8235_writepnpaddr(0x87);
 	vt8235_writepnpaddr(0x87);

src/southbridge/via/vt8235/vt8235_early_smbus.c

@@ -85,7 +85,6 @@ static int smbus_wait_until_ready(void)
 	unsigned long loops;
 	loops = SMBUS_TIMEOUT;
 	do {
-		unsigned char val;
 		smbus_delay();
 		c = inb(SMBUS_IO_BASE + SMBHSTSTAT);
 		while((c & 1) == 1) {
@@ -121,7 +120,6 @@ static int smbus_wait_until_done(void)
 	unsigned char byte;
 	loops = SMBUS_TIMEOUT;
 	do {
-		unsigned char val;
 		smbus_delay();
 		
 		byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);

src/superio/smsc/lpc47m10x/superio.c

@@ -44,7 +44,7 @@ static void lpc47m10x_init(device_t dev);
 
 static void pnp_enter_conf_state(device_t dev);
 static void pnp_exit_conf_state(device_t dev);
-static void dump_pnp_device(device_t dev);
+//static void dump_pnp_device(device_t dev);
 
 struct chip_operations superio_smsc_lpc47m10x_ops = {
 	CHIP_NAME("SMSC LPC47M10x Super I/O")