drivers/intel/fsp2_0: Make FSP Headers Consumable out of Box
The following patch is based off of the UEFI 2.6 patch. The FSP header files are temporarily staying in soc/intel/apollolake and FspUpd.h has been relocated since the other headers expect it to be in the root of an includable directory. Any struct defines were removed since they are defined in the headers and no longer need to be explicity declared as struct with the UEFI 2.6 includes. BUG=chrome-os-partner:54100 BRANCH=none TEST=confirmed coreboot builds successfully Change-Id: I10739dca1b6da3f15bd850adf06238f7c51508f7 Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com># Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/16308 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
committed by
Martin Roth
parent
e96543e1fa
commit
c31ba0ef52
@@ -231,7 +231,7 @@ static void soc_final(void *data)
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global_reset_lock();
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}
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static void disable_dev(struct device *dev, struct FSP_S_CONFIG *silconfig) {
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static void disable_dev(struct device *dev, FSP_S_CONFIG *silconfig) {
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switch (dev->path.pci.devfn) {
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case ISH_DEVFN:
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@@ -335,7 +335,7 @@ static void disable_dev(struct device *dev, struct FSP_S_CONFIG *silconfig) {
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}
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}
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static void parse_devicetree(struct FSP_S_CONFIG *silconfig)
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static void parse_devicetree(FSP_S_CONFIG *silconfig)
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{
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struct device *dev = NB_DEV_ROOT;
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@@ -350,9 +350,9 @@ static void parse_devicetree(struct FSP_S_CONFIG *silconfig)
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}
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}
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void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
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void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
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{
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struct FSP_S_CONFIG *silconfig = &silupd->FspsConfig;
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FSP_S_CONFIG *silconfig = &silupd->FspsConfig;
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static struct soc_intel_apollolake_config *cfg;
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/* Load VBT before devicetree-specific config. */
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