soc,southbridge/intel: Control SMI related FADT entries
When no SMI is installed, FADT should not advertise a trigger mechanism that does not respond. Change-Id: Ifb4f99c11a72e75ec20b9faaf62aed5546de91fa Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41909 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
committed by
Patrick Georgi
parent
2e270ae297
commit
c328a680de
@@ -35,11 +35,11 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
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fadt->dsdt = (uintptr_t)dsdt;
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fadt->preferred_pm_profile = 0; /* unspecified */
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fadt->sci_int = 9;
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fadt->smi_cmd = 0; /* smi command port */
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fadt->acpi_enable = 0; /* acpi enable smi command */
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fadt->acpi_disable = 0; /* acpi disable smi command */
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fadt->s4bios_req = 0x0;
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fadt->pstate_cnt = 0x0;
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if (CONFIG(HAVE_SMI_HANDLER)) {
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/* TODO: SMI handler is not implemented. */
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fadt->smi_cmd = 0x00;
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}
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fadt->pm1a_evt_blk = DEFAULT_PMBASE;
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fadt->pm1b_evt_blk = 0x0;
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@@ -60,7 +60,6 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
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fadt->pm_tmr_len = 4;
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fadt->gpe0_blk_len = 4;
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fadt->cst_cnt = 0; /* smi command to indicate c state changed notification */
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fadt->p_lvl2_lat = 101; /* >100 means c2 not supported */
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fadt->p_lvl3_lat = 1001; /* >1000 means c3 not supported */
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fadt->flush_size = 0; /* only needed if CPU wbinvd is broken */
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