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mb/*: Copy bd82x6x boards' USB port config into devicetree

Browse Source 
For mainboards using southbridge/intel/bd82x6x, copy the contents
of mainboard_usb_ports array into southbridge devicetree. In-line
comments are maintained.

Boards also capable of using MRC raminit are done in a separate
patch.

Change-Id: Ia8a967eb3466106f3a34e024260e13d02f449a25
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81879
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Keith Hui 2024-02-05 16:11:26 -05:00 committed by Martin L Roth
parent 51a01bdcd6
commit c36b5ea189
47 changed files with 746 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/mainboard/apple/macbookair4_2/devicetree.cb
View File

@ -26,6 +26,14 @@ chip northbridge/intel/sandybridge
register "pcie_port_coalesce" = "true"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x1"
register "usb_port_config" = "{
{1, 0, -1}, /* USB HUB 1 */
{0, 0, -1}, {0, 0, -1}, {0, 0, -1}, /* Unused x7 */
{0, 0, -1}, {0, 0, -1}, {0, 0, -1}, {0, 0, -1},
{1, 0, -1}, /* USB HUB 2 */
{1, 0, -1}, /* Camera */
{0, 0, -1}, {0, 0, -1}, {0, 0, -1}, {0, 0, -1} /* Unused x4 */
}"
device ref mei1 on # Management Engine Interface 1
subsystemid 0x8086 0x7270
end

6
src/mainboard/asrock/b75m-itx/devicetree.cb
View File

@ -27,6 +27,12 @@ chip northbridge/intel/sandybridge
register "xhci_switchable_ports" = "0x0000000f"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005"
register "usb_port_config" = "{
{1, 0, 0}, {1, 0, 0}, {1, 1, 1}, {1, 1, 1},
{1, 1, 2}, {1, 1, 2}, {1, 0, 3}, {1, 0, 3},
{1, 0, 4}, {1, 0, 4}, {1, 0, 6},
{1, 1, 5}, {1, 1, 5}, {1, 0, 6}
}"
device ref xhci on
subsystemid 0x1849 0x1e31

16
src/mainboard/asrock/b75pro3-m/devicetree.cb
View File

@ -39,6 +39,22 @@ chip northbridge/intel/sandybridge
register "xhci_switchable_ports" = "0x0000000f"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 1, 1 },
{ 1, 1, 1 },
{ 1, 1, 2 },
{ 1, 1, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 1, 5 },
{ 1, 1, 5 },
{ 1, 0, 6 }
}"
device ref xhci on # USB 3.0 Controller
subsystemid 0x1849 0x1e31

16
src/mainboard/asrock/h77pro4-m/devicetree.cb
View File

@ -21,6 +21,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 1, 1 },
{ 1, 1, 1 },
{ 1, 1, 2 },
{ 1, 1, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 1, 5 },
{ 1, 1, 5 },
{ 1, 0, 6 }
}"
device ref xhci on # USB 3.0 Controller
subsystemid 0x1849 0x1e31
end

16
src/mainboard/asus/h61-series/devicetree.cb
View File

@ -11,6 +11,22 @@ chip northbridge/intel/sandybridge
register "sata_port_map" = "0x33"
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 },
{ 1, 0, 6 }
}"
device ref mei1 on end
device ref mei2 off end

17
src/mainboard/asus/maximus_iv_gene-z/devicetree.cb
View File

@ -15,6 +15,23 @@ chip northbridge/intel/sandybridge
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 },
{ 1, 0, 6 }
}"
device ref mei1 on end
device ref mei2 off end
device ref me_ide_r off end

16
src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb
View File

@ -7,6 +7,22 @@ chip northbridge/intel/sandybridge
subsystemid 0x1043 0x84ca inherit
chip southbridge/intel/bd82x6x
register "gen1_dec" = "0x000c0291"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 }
}"
device ref pcie_rp1 on end # PCIEX16_4 (electrical x4)
device ref pcie_rp2 off end
device ref pcie_rp3 off end

16
src/mainboard/asus/p8x7x-series/variants/p8h77-v/overridetree.cb
View File

@ -4,6 +4,22 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x1043 0x84ca inherit
chip southbridge/intel/bd82x6x
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 }
}"
register "gen1_dec" = "0x000c0291"
device ref pcie_rp1 on end # PCIEX16_2 (electrical x4)
device ref pcie_rp2 off end

17
src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/overridetree.cb
View File

@ -4,6 +4,23 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x1043 0x84ca inherit
chip southbridge/intel/bd82x6x
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 }
}"
register "gen1_dec" = "0x000c0291"
device ref pcie_rp1 on end # PCIEX16_2 (electrical x4)

16
src/mainboard/biostar/th61-itx/devicetree.cb
View File

@ -15,6 +15,22 @@ chip northbridge/intel/sandybridge
register "sata_port_map" = "0x33"
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 }
}"
device ref mei1 on end # MEI #1
device ref ehci2 on end # EHCI #2

16
src/mainboard/compulab/intense_pc/devicetree.cb
View File

@ -48,6 +48,22 @@ chip northbridge/intel/sandybridge # FIXME: check gfx
register "xhci_switchable_ports" = "0x0000000f"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005"
register "usb_port_config" = "{
{ 1, 1, 0 },
{ 1, 1, 0 },
{ 1, 1, 1 },
{ 1, 1, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 1, 4 },
{ 1, 1, 4 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 },
{ 1, 0, 6 }
}"
device ref xhci on end # USB 3.0 Controller
device ref mei1 off end # Management Engine Interface 1

16
src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb
View File

@ -30,6 +30,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x08040201"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{ 1, 6, 0 },
{ 1, 6, 0 },
{ 1, 1, 1 },
{ 1, 1, 1 },
{ 1, 1, 2 },
{ 1, 1, 2 },
{ 1, 6, 3 },
{ 1, 6, 3 },
{ 1, 6, 4 },
{ 1, 6, 4 },
{ 1, 6, 5 },
{ 1, 1, 5 },
{ 1, 1, 6 },
{ 1, 6, 6 }
}"
device ref xhci on end
device ref mei1 off end
device ref mei2 off end

17
src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
View File

@ -20,7 +20,22 @@ chip northbridge/intel/sandybridge
register "xhci_switchable_ports" = "0xf"
register "superspeed_capable_ports" = "0xf"
register "usb_port_config" = "{
{ 1, 5, 0 },
{ 1, 5, 0 },
{ 1, 5, 1 },
{ 1, 5, 1 },
{ 1, 5, 2 },
{ 1, 5, 2 },
{ 1, 5, 3 },
{ 1, 5, 3 },
{ 1, 5, 4 },
{ 1, 5, 4 },
{ 1, 5, 6 },
{ 1, 5, 5 },
{ 1, 5, 5 },
{ 1, 5, 6 }
}"
device ref xhci on # USB 3.0 Controller
subsystemid 0x1458 0x5007

17
src/mainboard/gigabyte/ga-h61m-series/devicetree.cb
View File

@ -16,6 +16,23 @@ chip northbridge/intel/sandybridge
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 }
}"
device ref mei1 on end # MEI #1
device ref ehci2 on end # USB2 EHCI #2
device ref hda on end # HD Audio

17
src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb
View File

@ -26,6 +26,23 @@ chip northbridge/intel/sandybridge
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x0"
register "usb_port_config" = "{
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 }
}"
device ref mei1 on end # Management Engine Interface 1
device ref mei2 off end # Management Engine Interface 2
device ref me_ide_r off end # Management Engine IDE-R

16
src/mainboard/hp/compaq_elite_8300_usdt/devicetree.cb
View File

@ -19,6 +19,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 }
}"
device ref xhci on # USB 3.0 Controller
subsystemid 0x103c 0x3398
end

16
src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb
View File

@ -9,6 +9,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_switchable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x0000000f"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 1, 5 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 7 },
{ 1, 0, 7 }
}"
device ref xhci on end
device ref pcie_rp2 on end

16
src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb
View File

@ -9,6 +9,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_switchable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x0000000f"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 1, 5 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 7 },
{ 1, 0, 7 }
}"
device ref xhci on end
end

16
src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
View File

@ -23,6 +23,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{1, 1, 0}, /* SSP1: dock */
{1, 1, 0}, /* SSP2: left, EHCI Debug */
{0, 1, 1}, /* SSP3 */
{1, 1, 1}, /* SSP4: right */
{0, 0, 2}, /* B0P5 */
{0, 0, 2}, /* B0P6 */
{0, 0, 3}, /* B0P7 */
{1, 0, 3}, /* B0P8: smart card reader */
{1, 0, 4}, /* B1P1: fingerprint reader */
{1, 0, 4}, /* B1P2: (EHCI Debug) wlan usb */
{1, 1, 5}, /* B1P3: Camera */
{1, 0, 5}, /* B1P4 */
{1, 0, 6}, /* B1P5: wwan USB */
{0, 0, 6}
}"
device ref xhci on end
device ref mei1 on end

17
src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
View File

@ -21,6 +21,23 @@ chip northbridge/intel/sandybridge
# HDD(0), ODD(1), eSATA(4), dock eSATA(5)
register "sata_port_map" = "0x33"
register "usb_port_config" = "{
{1, 1, 0}, /* back bottom USB port, USB debug */
{1, 1, 0}, /* back upper USB port */
{1, 1, 1}, /* eSATA */
{1, 1, 1}, /* webcam */
{1, 0, 2},
{1, 0, 2}, /* bluetooth */
{1, 0, 3},
{1, 0, 3}, /* smartcard */
{1, 1, 4}, /* fingerprint reader */
{1, 1, 4}, /* WWAN */
{0, 0, 5},
{1, 0, 5}, /* docking */
{0, 0, 6},
{0, 0, 6}
}"
device ref pcie_rp1 off end
device ref pcie_rp2 on
smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort"

16
src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
View File

@ -22,6 +22,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{1, 1, 0},
{0, 1, 0},
{1, 1, 1},
{1, 1, 1},
{1, 0, 2},
{1, 0, 2}, /* bluetooth */
{0, 0, 3},
{1, 0, 3}, /* smartcard */
{1, 1, 4},
{1, 1, 4}, /* mainboard USB 2.0 */
{1, 0, 5}, /* camera */
{0, 0, 5},
{1, 0, 6}, /* WWAN */
{0, 0, 6}
}"
device ref xhci on end
device ref pcie_rp1 on end

17
src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
View File

@ -20,6 +20,23 @@ chip northbridge/intel/sandybridge
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "sata_port_map" = "0x21"
register "usb_port_config" = "{
{ 1, 1, 0 },
{ 1, 1, 0 },
{ 1, 1, 1 },
{ 1, 1, 1 },
{ 1, 0, 2 },
{ 1, 1, 2 },
{ 0, 0, 3 },
{ 1, 0, 3 },
{ 1, 1, 4 },
{ 1, 0, 4 },
{ 0, 0, 5 },
{ 1, 1, 5 },
{ 0, 0, 6 },
{ 1, 1, 6 }
}"
device ref pcie_rp1 on end
device ref pcie_rp2 on
smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort"

17
src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
View File

@ -21,6 +21,23 @@ chip northbridge/intel/sandybridge
# HDD(0), ODD(1), docking(3,5), eSATA(4)
register "sata_port_map" = "0x3b"
register "usb_port_config" = "{
{1, 1, 0}, /* USB0, eSATA */
{1, 0, 0}, /* USB charger */
{0, 1, 1},
{1, 1, 1}, /* camera */
{1, 0, 2}, /* USB4 expresscard */
{1, 0, 2}, /* bluetooth */
{0, 0, 3},
{1, 0, 3}, /* smartcard */
{1, 1, 4}, /* fingerprint */
{1, 1, 4}, /* WWAN */
{1, 0, 5}, /* CONN */
{1, 0, 5}, /* docking */
{1, 0, 6}, /* CONN */
{1, 0, 6} /* docking */
}"
device ref me_kt on end
device ref pcie_rp1 on end
device ref pcie_rp2 on

16
src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
View File

@ -23,6 +23,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{ 1, 1, 0 },
{ 1, 1, 0 },
{ 1, 1, 1 },
{ 1, 1, 1 },
{ 1, 0, 2 },
{ 0, 0, 2 },
{ 0, 0, 3 },
{ 1, 0, 3 },
{ 1, 1, 4 },
{ 1, 1, 4 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 },
{ 1, 0, 6 }
}"
device ref xhci on end
device ref me_kt on end

16
src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
View File

@ -24,6 +24,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{1, 1, 0}, /* Dock USB3.0 */
{1, 1, 0}, /* Conn */
{1, 1, 1}, /* USB 3.0 */
{1, 1, 1}, /* USB 3.0 */
{1, 0, 2}, /* Express Card */
{1, 0, 2}, /* Bluetooth */
{0, 0, 3},
{1, 0, 3}, /* Smart Card */
{1, 1, 4}, /* Fingerprint Reader */
{1, 1, 4}, /* Conn (Charger) */
{1, 0, 5}, /* Camera */
{1, 0, 5}, /* Dock */
{1, 0, 6}, /* WWAN */
{1, 0, 6} /* Conn (eSATA Combo) */
}"
device ref xhci on end
device ref pcie_rp1 on end

16
src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
View File

@ -22,6 +22,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{1, 1, 0}, /* SSP1: dock */
{1, 1, 0}, /* SSP2: left, EHCI Debug */
{1, 1, 1}, /* SSP3: right back side */
{1, 1, 1}, /* SSP4: right front side */
{1, 0, 2}, /* B0P5 */
{1, 0, 2}, /* B0P6: wlan USB */
{0, 0, 3}, /* B0P7 */
{1, 1, 3}, /* B0P8: smart card reader */
{1, 1, 4}, /* B1P1: fingerprint reader */
{0, 0, 4}, /* B1P2: (EHCI Debug, not connected) */
{1, 1, 5}, /* B1P3: Camera */
{0, 0, 5}, /* B1P4 */
{1, 1, 6}, /* B1P5: wwan USB */
{0, 0, 6}
}"
device ref xhci on end
device ref pcie_rp1 on end

17
src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
View File

@ -20,6 +20,23 @@ chip northbridge/intel/sandybridge
# FIXME: ports 3, 5 are untested
register "sata_port_map" = "0x3b"
register "usb_port_config" = "{
{1, 1, 0}, /* left front */
{1, 1, 0}, /* left rear, debug */
{1, 1, 1}, /* eSATA */
{1, 1, 1}, /* webcam */
{1, 0, 2},
{1, 0, 2}, /* bluetooth */
{0, 0, 3},
{0, 0, 3},
{1, 1, 4}, /* fingerprint reader */
{1, 1, 4}, /* WWAN */
{1, 0, 5}, /* right */
{1, 0, 5},
{1, 0, 6},
{1, 0, 6}
}"
device ref pcie_rp1 on end
device ref pcie_rp2 on
smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort"

16
src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
View File

@ -22,6 +22,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{ 1, 1, 0 },
{ 1, 0, 0 },
{ 1, 1, 1 },
{ 0, 1, 1 },
{ 0, 0, 2 },
{ 1, 0, 2 },
{ 0, 0, 3 },
{ 0, 0, 3 },
{ 1, 0, 4 }, /* B1P1: Digitizer */
{ 1, 0, 4 }, /* B1P2: wlan USB, EHCI debug */
{ 1, 1, 5 }, /* B1P3: Camera */
{ 0, 0, 5 }, /* B1P4 */
{ 1, 0, 6 }, /* B1P5: wwan USB */
{ 0, 0, 6 }, /* B1P6 */
}"
device ref xhci on end
device ref pcie_rp1 on end

16
src/mainboard/intel/dq67sw/devicetree.cb
View File

@ -14,6 +14,22 @@ chip northbridge/intel/sandybridge
register "sata_port_map" = "0x3f"
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "usb_port_config" = "{
{ 1, 1, 0 },
{ 1, 1, 0 },
{ 1, 1, 1 },
{ 1, 1, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 1, 4 },
{ 1, 1, 4 },
{ 0, 0, 5 },
{ 0, 0, 5 },
{ 1, 0, 6 },
{ 1, 0, 6 }
}"
device ref mei1 on end # Management Engine Interface 1
device ref me_ide_r on end # Management Engine IDE-R
device ref me_kt on end # Management Engine KT

17
src/mainboard/lenovo/l520/devicetree.cb
View File

@ -43,6 +43,23 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0"
register "spi_lvscc" = "0x2005"
register "usb_port_config" = "{
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 0, -1 }
}"
device ref mei1 on end # Management Engine Interface 1
device ref mei2 off end # Management Engine Interface 2
device ref me_ide_r off end # Management Engine IDE-R

16
src/mainboard/lenovo/s230u/devicetree.cb
View File

@ -34,6 +34,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{ 1, 1, 0 },
{ 1, 0, 0 },
{ 1, 1, 1 },
{ 1, 0, 1 },
{ 1, 1, 2 },
{ 1, 0, 2 },
{ 0, 0, 3 },
{ 0, 1, 3 },
{ 1, 0, 4 },
{ 1, 1, 4 },
{ 1, 1, 5 },
{ 1, 1, 5 },
{ 1, 1, 6 },
{ 1, 1, 6 }
}"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005"

18
src/mainboard/lenovo/t420/devicetree.cb
View File

@ -58,6 +58,24 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005"
# OC3 set in BIOS to port 2-7, OC7 set in BIOS to port 10-13
register "usb_port_config" = "{
{1, 1, 0}, /* P0: system port 4, OC0 */
{1, 1, 1}, /* P1: system port 2 (EHCI debug), OC 1 */
{1, 1, -1}, /* P2: HALF MINICARD (WLAN) no oc */
{1, 0, -1}, /* P3: WWAN, no OC */
{1, 0, -1}, /* P4: smartcard, no OC */
{1, 1, -1}, /* P5: ExpressCard, no OC */
{0, 0, -1}, /* P6: empty */
{0, 0, -1}, /* P7: empty */
{1, 1, 4}, /* P8: system port 3, OC4*/
{1, 1, 5}, /* P9: system port 1 (EHCI debug), OC 5 */
{1, 0, -1}, /* P10: fingerprint reader, no OC */
{1, 0, -1}, /* P11: bluetooth, no OC. */
{1, 1, -1}, /* P12: docking, no OC */
{1, 1, -1} /* P13: camera (LCD), no OC */
}"
device ref mei1 on end # Management Engine Interface 1
device ref mei2 off end # Management Engine Interface 2
device ref me_ide_r off end # Management Engine IDE-R

17
src/mainboard/lenovo/t420s/devicetree.cb
View File

@ -60,6 +60,23 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005"
register "usb_port_config" = "{
{0, 1, -1}, /* P0: empty */
{1, 1, 1}, /* P1: system port 2 (To system port) (EHCI debug), OC 1 */
{1, 1, -1}, /* P2: HALF MINICARD (WLAN) no oc */
{1, 0, -1}, /* P3: WWAN, no OC */
{1, 1, -1}, /* P4: smartcard, no OC */
{1, 1, -1}, /* P5: ExpressCard, no OC */
{0, 0, -1}, /* P6: empty */
{0, 0, -1}, /* P7: empty */
{0, 1, -1}, /* P8: empty (touch panel) */
{1, 0, 5}, /* P9: system port 1 (To USBAO) (EHCI debug), OC 5 */
{1, 0, -1}, /* P10: fingerprint reader, no OC */
{1, 1, -1}, /* P11: bluetooth, no OC. */
{1, 1, -1}, /* P12: docking, no OC */
{1, 1, -1} /* P13: camera (LCD), no OC */
}"
device ref mei1 on end # Management Engine Interface 1
device ref mei2 off end # Management Engine Interface 2
device ref me_ide_r off end # Management Engine IDE-R

16
src/mainboard/lenovo/t430/devicetree.cb
View File

@ -35,6 +35,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x7"
register "xhci_switchable_ports" = "0x7"
register "xhci_overcurrent_mapping" = "0x04000201"
register "usb_port_config" = "{
{ 1, 1, 0 },
{ 1, 1, 1 },
{ 1, 2, 3 },
{ 1, 1, -1 },
{ 1, 1, 2 },
{ 1, 0, -1 },
{ 0, 0, -1 },
{ 1, 2, -1 },
{ 1, 0, -1 },
{ 1, 1, 5 },
{ 1, 0, -1 },
{ 1, 0, -1 },
{ 1, 3, -1 },
{ 1, 1, -1 }
}"
# device specific SPI configuration
register "spi_uvscc" = "0x2005"

16
src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb
View File

@ -2,6 +2,22 @@ chip northbridge/intel/sandybridge
register "spd_addresses" = "{0x50, 0, 0x51, 0}"
device domain 0 on
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "usb_port_config" = "{
{ 1, 0, 0 }, /* P0:, OC 0 */
{ 1, 1, 1 }, /* P1: (EHCI debug), OC 1 */
{ 1, 1, 3 }, /* P2: OC 3 */
{ 1, 0, -1 }, /* P3: no OC */
{ 1, 2, -1 }, /* P4: no OC */
{ 1, 1, -1 }, /* P5: no OC */
{ 1, 1, -1 }, /* P6: no OC */
{ 0, 1, -1 }, /* P7: empty, no OC */
{ 1, 1, -1 }, /* P8: smart card reader, no OC */
{ 1, 0, 5 }, /* P9: (EHCI debug), OC 5 */
{ 1, 0, -1 }, /* P10: fingerprint reader, no OC */
{ 1, 1, -1 }, /* P11: bluetooth, no OC. */
{ 0, 0, -1 }, /* P12: wlan, no OC */
{ 1, 1, -1 }, /* P13: camera, no OC */
}"
# Enable hotplug on Port 5 for Thunderbolt controller
register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 1, 0, 0, 0 }"
device ref pcie_rp5 on end # Thunderbolt controller

17
src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb
View File

@ -23,6 +23,23 @@ chip northbridge/intel/sandybridge
# T431s has no Express Card slot.
register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
register "usb_port_config" = "{
{ 1, 0, 0 }, /* SSP1: right */
{ 1, 0, 1 }, /* SSP2: left, EHCI Debug */
{ 1, 1, 3 }, /* SSP3: dock USB3 */
{ 1, 1, -1 }, /* B0P4: wwan USB */
{ 1, 1, 2 }, /* B0P5: dock USB2 */
{ 0, 0, -1 }, /* B0P6 */
{ 0, 0, -1 }, /* B0P7 */
{ 1, 2, -1 }, /* B0P8: unknown */
{ 1, 0, -1 }, /* B1P1: smart card reader */
{ 0, 2, 5 }, /* B1P2 */
{ 1, 1, -1 }, /* B1P3: fingerprint reader */
{ 0, 0, -1 }, /* B1P4 */
{ 1, 1, -1 }, /* B1P5: wlan USB */
{ 1, 1, -1 }, /* B1P6: Camera */
}"
device ref pcie_rp1 on
chip drivers/ricoh/rce822 # Ricoh cardreader
register "disable_mask" = "0x87"

16
src/mainboard/lenovo/t530/variants/t530/overridetree.cb
View File

@ -2,6 +2,22 @@ chip northbridge/intel/sandybridge
register "spd_addresses" = "{0x50, 0, 0x51, 0}"
device domain 0 on
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "usb_port_config" = "{
{ 1, 1, 0 }, /* P0: USB double port upper, USB3, OC 0 */
{ 1, 1, 1 }, /* P1: USB double port lower, USB3, (EHCI debug) OC 1 */
{ 1, 2, 3 }, /* P2: Dock, USB3, OC 3 */
{ 1, 1, -1 }, /* P3: WWAN slot, no OC */
{ 1, 1, 2 }, /* P4: yellow USB, OC 2 */
{ 1, 0, -1 }, /* P5: ExpressCard slot, no OC */
{ 0, 0, -1 }, /* P6: empty */
{ 1, 2, -1 }, /* P7: docking, no OC */
{ 1, 0, -1 }, /* P8: smart card reader, no OC */
{ 1, 1, 5 }, /* P9: USB port single (EHCI debug), OC 5 */
{ 1, 0, -1 }, /* P10: fingerprint reader, no OC */
{ 1, 0, -1 }, /* P11: bluetooth, no OC. */
{ 1, 3, -1 }, /* P12: wlan, no OC - disabled in vendor bios*/
{ 1, 1, -1 }, /* P13: camera, no OC */
}"
device ref lpc on
chip ec/lenovo/h8
device pnp ff.2 on end # dummy

16
src/mainboard/lenovo/t530/variants/w530/overridetree.cb
View File

@ -5,6 +5,22 @@ chip northbridge/intel/sandybridge
subsystemid 0x17aa 0x21f5
end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "usb_port_config" = "{
{ 1, 1, 0 }, /* P0: USB double port upper, USB3, OC 0 */
{ 1, 1, 1 }, /* P1: USB double port lower, USB3, (EHCI debug) OC 1 */
{ 1, 2, 3 }, /* P2: Dock, USB3, OC 3 */
{ 1, 1, -1 }, /* P3: WWAN slot, no OC */
{ 1, 1, 2 }, /* P4: yellow USB, OC 2 */
{ 1, 0, -1 }, /* P5: ExpressCard slot, no OC */
{ 1, 0, -1 }, /* P6: color sensor, no OC */
{ 1, 2, -1 }, /* P7: docking, no OC */
{ 1, 0, -1 }, /* P8: smart card reader, no OC */
{ 1, 1, 5 }, /* P9: USB port single (EHCI debug), OC 5 */
{ 1, 0, -1 }, /* P10: fingerprint reader, no OC */
{ 1, 0, -1 }, /* P11: bluetooth, no OC. */
{ 1, 3, -1 }, /* P12: wlan, no OC - disabled in vendor bios*/
{ 1, 1, -1 }, /* P13: camera, no OC */
}"
device ref me_kt on end
device ref pcie_rp1 on
chip drivers/ricoh/rce822 # Ricoh cardreader

12
src/mainboard/lenovo/x131e/devicetree.cb
View File

@ -43,6 +43,18 @@ chip northbridge/intel/sandybridge
register "xhci_switchable_ports" = "0xf"
register "superspeed_capable_ports" = "0xf"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "usb_port_config" = "{
{1, 1, 0}, /* P0: USB 3.0 1 (OC0) */
{1, 1, 0}, /* P1: USB 3.0 2 (OC0) */
{0, 0, 0},
{1, 1, -1}, /* P3: Camera (no OC) */
{1, 0, -1}, /* P4: WLAN (no OC) */
{1, 0, -1}, /* P5: WWAN (no OC) */
{0, 0, 0}, {0, 0, 0}, {0, 0, 0},
{1, 1, 4}, /* P9: USB 2.0 (AUO4) (OC4) */
{0, 0, 0}, {0, 0, 0}, {0, 0, 0},
{1, 0, -1} /* P13: Bluetooth (no OC) */
}"
# Enable zero-based linear PCIe root port functions
register "pcie_port_coalesce" = "true"

16
src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb
View File

@ -43,6 +43,22 @@ chip northbridge/intel/sandybridge
register "xhci_switchable_ports" = "0xf"
register "superspeed_capable_ports" = "0xf"
register "xhci_overcurrent_mapping" = "0x4000201"
register "usb_port_config" = "{
{0, 3, 0 }, /* P00 disconnected */
{1, 1, 1 }, /* P01 left or right */
{0, 1, 3 }, /* P02 disconnected */
{1, 3, -1}, /* P03 WWAN */
{0, 1, 2 }, /* P04 disconnected */
{0, 1, -1}, /* P05 disconnected */
{0, 1, -1}, /* P06 disconnected */
{0, 2, -1}, /* P07 disconnected */
{0, 1, -1}, /* P08 disconnected */
{1, 2, 5 }, /* P09 left or right */
{1, 3, -1}, /* P10 FPR */
{1, 3, -1}, /* P11 Bluetooth */
{1, 1, -1}, /* P12 WLAN */
{1, 1, -1} /* P13 Camera */
}"
# Enable zero-based linear PCIe root port functions
register "pcie_port_coalesce" = "true"

16
src/mainboard/lenovo/x220/variants/x1/overridetree.cb
View File

@ -16,6 +16,22 @@ chip northbridge/intel/sandybridge
subsystemid 0x17aa 0x21e8 inherit
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "usb_port_config" = "{
{ 1, 1, 0 },
{ 1, 1, 1 },
{ 1, 1, 3 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 1, 3 },
{ 0, 0, 3 },
{ 0, 0, 3 },
{ 1, 1, 4 },
{ 1, 1, 5 },
{ 1, 0, 7 },
{ 1, 1, 7 },
{ 1, 1, 7 },
{ 1, 0, 7 }
}"
# Enable SATA ports 0 (HDD bay) & 2 (msata) & 3 (esatap)
register "sata_port_map" = "0x1d"
# X1 does not have ExpressCard slot

16
src/mainboard/lenovo/x230/variants/x230/overridetree.cb
View File

@ -3,6 +3,22 @@ chip northbridge/intel/sandybridge
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "docking_supported" = "1"
register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
register "usb_port_config" = "{
{1, 0, 0 }, /* P0 (left, fan side), OC 0 */
{1, 0, 1 }, /* P1 (left touchpad side), OC 1 */
{1, 1, 3 }, /* P2: dock, OC 3 */
{1, 1, -1}, /* P3: wwan, no OC */
{1, 1, -1}, /* P4: Wacom tablet on X230t, otherwise empty */
{1, 1, -1}, /* P5: Expresscard, no OC */
{0, 0, -1}, /* P6: Empty */
{1, 2, -1}, /* P7: dock, no OC */
{0, 0, -1}, /* P8: Empty */
{1, 2, 5 }, /* P9: Right (EHCI debug), OC 5 */
{1, 1, -1}, /* P10: fingerprint reader, no OC */
{1, 1, -1}, /* P11: bluetooth, no OC. */
{1, 1, -1}, /* P12: wlan, no OC */
{1, 1, -1}, /* P13: webcam, no OC */
}"
device ref pcie_rp3 on
smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
end

17
src/mainboard/lenovo/x230/variants/x230s/overridetree.cb
View File

@ -18,7 +18,22 @@ chip northbridge/intel/sandybridge
# X230s does not support docking
# Enable SATA ports 0 (HDD bay) & 1 (WWAN M.2 SATA)
register "sata_port_map" = "0x3"
register "usb_port_config" = "{
{1, 3, 0}, /* SSP1: Right */
{1, 3, 1}, /* SSP2: Left, EHCI Debug */
{0, 1, 3}, /* SSP3 */
{1, 3, -1}, /* B0P4: WWAN USB */
{0, 1, 2}, /* B0P5 */
{0, 1, -1}, /* B0P6 */
{0, 1, -1}, /* B0P7 */
{0, 1, -1}, /* B0P8 */
{0, 1, -1}, /* B1P1 */
{0, 1, 5}, /* B1P2 */
{1, 1, -1}, /* B1P3: Fingerprint Reader */
{0, 1, -1}, /* B1P4 */
{1, 3, -1}, /* B1P5: WLAN USB */
{1, 1, -1}, /* B1P6: Camera */
}"
device ref lpc on
chip ec/lenovo/h8
register "config1" = "0x05"

16
src/mainboard/msi/ms7707/devicetree.cb
View File

@ -17,6 +17,22 @@ chip northbridge/intel/sandybridge
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "gpe0_en" = "0x28000040"
register "usb_port_config" = "{
{1, 0, 0},
{1, 0, 0},
{1, 0, 1},
{1, 0, 1},
{1, 0, 2},
{1, 0, 2},
{1, 0, 3},
{1, 0, 3},
{1, 0, 4},
{1, 0, 4},
{1, 0, 6},
{1, 0, 5},
{1, 0, 5},
{1, 0, 6}
}"
device ref mei1 on end # Management Engine Interface 1
device ref mei2 off end # Management Engine Interface 2

17
src/mainboard/sapphire/pureplatinumh61/devicetree.cb
View File

@ -9,6 +9,23 @@ chip northbridge/intel/sandybridge
register "pcie_port_coalesce" = "true"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x33"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 }
}"
register "spi.opprefixes" = "{ 0x50, 0x06 }"
register "spi.ops" = "{{0x01, WRITE_NO_ADDR},
{0x02, WRITE_WITH_ADDR},

16
src/mainboard/supermicro/x9sae/devicetree.cb
View File

@ -26,6 +26,22 @@ chip northbridge/intel/sandybridge
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
register "usb_port_config" = "{
{ 1, 0, 0 },
{ 1, 0, 0 },
{ 1, 0, 1 },
{ 1, 0, 1 },
{ 1, 0, 2 },
{ 1, 0, 2 },
{ 1, 0, 3 },
{ 1, 0, 3 },
{ 1, 0, 4 },
{ 1, 0, 4 },
{ 1, 0, 6 },
{ 1, 0, 5 },
{ 1, 0, 5 },
{ 1, 0, 6 }
}"
device ref xhci on end # xHCI
device ref mei1 on end # MEI #1

18
src/mainboard/supermicro/x9scl/devicetree.cb
View File

@ -17,6 +17,24 @@ chip northbridge/intel/sandybridge
register "sata_port_map" = "0x3f"
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "usb_port_config" = "{
{ 1, 0, 0 }, /* ? USB0 1d.0 port 1 */
{ 1, 0, 0 }, /* ? USB1 1d.0 port 2 */
{ 1, 0, 1 }, /* ? USB2 1d.0 port 3 */
{ 1, 0, 1 }, /* ? USB3 1d.0 port 4 */
{ 1, 0, 2 }, /* ? USB4 1d.0 port 5 */
{ 1, 0, 2 }, /* ? USB5 1d.0 port 6 */
{ 1, 0, 3 }, /* ? ??? 1a.0 port 1 */
{ 1, 0, 3 }, /* ? BMC 1a.0 port 2 */
{ 1, 0, 4 }, /* ? ??? 1a.0 port 3 */
{ 1, 0, 4 }, /* ? USB11 1a.0 port 4 */
{ 1, 0, 6 }, /* ? USB12 1a.0 port 5 */
{ 1, 0, 5 }, /* ? USB13 1a.0 port 6 */
{ 1, 0, 5 },
{ 1, 0, 6 }
}"
device ref mei1 off end # Management Engine Interface 1
device ref mei2 off end # Management Engine Interface 2
device ref me_ide_r off end # Management Engine IDE-R