ACPI: Replace smm_setup_structures()
Except for whitespace and varying casts the codes were the same when implemented. Platforms that did not implement this are tagged with ACPI_NO_SMI_GNVS. Change-Id: I31ec85ebce03d0d472403806969f863e4ca03b6b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42362 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
committed by
Patrick Georgi
parent
5daa1d3898
commit
c3c55210ee
@@ -10,11 +10,6 @@
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#include "smi.h"
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void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
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{
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printk(BIOS_DEBUG, "%s STUB!!!\n", __func__);
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}
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/** Set the EOS bit and enable SMI generation from southbridge */
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void global_smi_enable(void)
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{
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@@ -10,11 +10,6 @@
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#include "smi.h"
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void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
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{
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printk(BIOS_DEBUG, "%s STUB!!!\n", __func__);
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}
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/** Set the EOS bit and enable SMI generation from southbridge */
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void global_smi_enable(void)
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{
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@@ -665,7 +665,7 @@ static void southbridge_inject_dsdt(const struct device *dev)
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#endif
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/* And tell SMI about it */
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smm_setup_structures(gnvs, NULL, NULL);
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apm_control(APM_CNT_GNVS_UPDATE);
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/* Add it to DSDT. */
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acpigen_write_scope("\\");
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@@ -79,25 +79,6 @@ void global_smi_enable(void)
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smm_southbridge_enable(PWRBTN_EN | GBL_EN);
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}
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void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
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{
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/*
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* Issue SMI to set the gnvs pointer in SMM.
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* tcg and smi1 are unused.
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*
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* EAX = APM_CNT_GNVS_UPDATE
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* EBX = gnvs pointer
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* EDX = APM_CNT
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*/
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asm volatile (
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"outb %%al, %%dx\n\t"
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: /* ignore result */
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: "a" (APM_CNT_GNVS_UPDATE),
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"b" ((uintptr_t)gnvs),
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"d" (APM_CNT)
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);
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}
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void smm_southbridge_clear_state(void)
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{
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if (smi_enabled())
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@@ -622,7 +622,7 @@ static void southbridge_inject_dsdt(const struct device *dev)
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acpi_create_gnvs(gnvs);
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/* And tell SMI about it */
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smm_setup_structures(gnvs, NULL, NULL);
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apm_control(APM_CNT_GNVS_UPDATE);
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/* Add it to SSDT. */
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acpigen_write_scope("\\");
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@@ -464,7 +464,7 @@ static void southbridge_inject_dsdt(const struct device *dev)
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acpi_create_gnvs(gnvs);
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/* And tell SMI about it */
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smm_setup_structures(gnvs, NULL, NULL);
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apm_control(APM_CNT_GNVS_UPDATE);
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/* Add it to SSDT. */
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acpigen_write_scope("\\");
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@@ -623,7 +623,7 @@ static void southbridge_inject_dsdt(const struct device *dev)
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acpi_create_gnvs(gnvs);
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/* And tell SMI about it */
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smm_setup_structures(gnvs, NULL, NULL);
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apm_control(APM_CNT_GNVS_UPDATE);
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/* Add it to SSDT. */
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acpigen_write_scope("\\");
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@@ -566,7 +566,7 @@ static void southbridge_inject_dsdt(const struct device *dev)
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gnvs->pcnt = dev_count_cpu();
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/* And tell SMI about it */
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smm_setup_structures(gnvs, NULL, NULL);
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apm_control(APM_CNT_GNVS_UPDATE);
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/* Add it to SSDT. */
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acpigen_write_scope("\\");
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@@ -721,7 +721,7 @@ static void southbridge_inject_dsdt(const struct device *dev)
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gnvs->cbmc = (u32)cbmem_find(CBMEM_ID_CONSOLE);
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/* And tell SMI about it */
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smm_setup_structures(gnvs, NULL, NULL);
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apm_control(APM_CNT_GNVS_UPDATE);
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/* Add it to DSDT. */
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acpigen_write_scope("\\");
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@@ -57,22 +57,3 @@ void global_smi_enable(void)
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{
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smm_southbridge_enable(PWRBTN_EN | GBL_EN);
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}
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void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
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{
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/*
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* Issue SMI to set the gnvs pointer in SMM.
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* tcg and smi1 are unused.
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*
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* EAX = APM_CNT_GNVS_UPDATE
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* EBX = gnvs pointer
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* EDX = APM_CNT
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*/
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asm volatile (
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"outb %%al, %%dx\n\t"
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: /* ignore result */
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: "a" (APM_CNT_GNVS_UPDATE),
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"b" ((u32)gnvs),
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"d" (APM_CNT)
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);
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}
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