sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

intel boards: Use acpi_is_wakeup_s3()

Browse Source 
Change-Id: Icab0aeb2d5bf19b4029ca29b8a1e7564ef59a538
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6071
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Kyösti Mälkki
2014-06-19 19:50:51 +03:00
committed by Patrick Georgi
parent 49380b87d1
commit c3ed88636a
27 changed files with 28 additions and 56 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/soc/intel/baytrail/ehci.c
View File

@@ -143,7 +143,7 @@ static void ehci_init(device_t dev)
};
/* Don't reset controller in S3 resume path */
if (acpi_slp_type != 3)
if (!acpi_is_wakeup_s3())
reg_script_run_on_dev(dev, ehci_hc_reset);
/* Disable controller if ports are routed to XHCI */

2
src/soc/intel/baytrail/elog.c
View File

@@ -73,7 +73,7 @@ static void log_wake_events(const struct chipset_power_state *ps)
if (ps->pm1_sts & WAK_STS) {
elog_add_event_byte(ELOG_TYPE_ACPI_WAKE,
acpi_slp_type == 3 ? 3 : 5);
acpi_is_wakeup_s3() ? 3 : 5);
}
if (ps->pm1_sts & PWRBTN_STS) {

11
src/soc/intel/baytrail/refcode.c
View File

@@ -29,15 +29,6 @@
#include <baytrail/ramstage.h>
#include <baytrail/efi_wrapper.h>
static inline int is_s3_resume(void)
{
#if CONFIG_HAVE_ACPI_RESUME
return acpi_slp_type == 3;
#else
return 0;
#endif
}
static inline struct ramstage_cache *next_cache(struct ramstage_cache *c)
{
return (struct ramstage_cache *)&c->program[c->size];
@@ -140,7 +131,7 @@ static efi_wrapper_entry_t load_reference_code(void)
};
int ret;
if (is_s3_resume()) {
if (acpi_is_wakeup_s3()) {
return load_refcode_from_cache();
}