Move baytrail & fsp_baytrail to the common IFD interface.
- Add the common/firmware subdir to the baytrail & fsp_baytrail makefiles and remove the code it replaces. - Update baytrail & fsp_baytrail Kconfigs to use the common code. - Update the IFD Kconfig help and prompts for the TXE vs ME. - Whittle away at the CBFS_SIZE defaults. All the fsp_baytrail platforms have their own defaults. Change-Id: I96a9d4acd6578225698dba28d132d203b8fb71a0 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10647 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Stefan Reinauer
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c407cb97bc
@@ -342,9 +342,8 @@ config CBFS_SIZE
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NORTHBRIDGE_INTEL_GM45 || NORTHBRIDGE_INTEL_SANDYBRIDGE || \
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NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE || \
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NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE || \
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NORTHBRIDGE_INTEL_NEHALEM || SOC_INTEL_BAYTRAIL || SOC_INTEL_BRASWELL || \
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NORTHBRIDGE_INTEL_NEHALEM || SOC_INTEL_BRASWELL || \
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SOC_INTEL_BROADWELL
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default 0x200000 if SOC_INTEL_FSP_BAYTRAIL
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default ROM_SIZE
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help
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This is the part of the ROM actually managed by CBFS, located at the
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