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mb/google/dedede/var/kracko: Add LTE only daughterboard support

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Add FW_CONFIG for no port LTE skus, and probe LTE port in devicetree.

BUG=b:339534479
BRANCH=firmware-dedede-13606.B
TEST=emerge-dedede coreboot chromeos-bootimage
flash and check boot log on DUT.

Change-Id: I5235df33a36f3b9472ee8b615e4622f6ee3fb1a4
Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83054
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
Robert Chen 2024-06-12 03:25:52 -04:00 committed by Felix Held
parent c3e7d833dd
commit c40e3c9c19
3 changed files with 9 additions and 0 deletions
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1
src/mainboard/google/dedede/variants/baseboard/devicetree.cb
View File

@ -9,6 +9,7 @@ fw_config
option DB_PORTS_1C_1A_LTE 6
option DB_PORTS_1C 7
option DB_PORTS_1A_HDMI_LTE 8
option DB_PORTS_LTE 9
end
field STYLUS 4
option STYLUS_ABSENT 0

2
src/mainboard/google/dedede/variants/kracko/overridetree.cb
View File

@ -131,6 +131,7 @@ chip soc/intel/jasperlake
register "enable_delay_ms" = "20"
device usb 2.3 on
probe DB_PORTS DB_PORTS_1C_LTE
probe DB_PORTS DB_PORTS_LTE
end
end
chip drivers/usb/acpi
@ -175,6 +176,7 @@ chip soc/intel/jasperlake
register "group" = "ACPI_PLD_GROUP(2, 2)"
device usb 3.3 on
probe DB_PORTS DB_PORTS_1C_LTE
probe DB_PORTS DB_PORTS_LTE
end
end
chip drivers/usb/acpi

6
src/mainboard/google/dedede/variants/kracko/ramstage.c
View File

@ -24,6 +24,12 @@ static void usb_port_update(void)
cfg->usb2_ports[3].enable = 0;
cfg->usb3_ports[3].enable = 0;
}
if (fw_config_is_provisioned() &&
fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_LTE))) {
/* Disable USB C1 port */
cfg->usb2_ports[1].enable = 0;
cfg->usb3_ports[1].enable = 0;
}
}
void variant_devtree_update(void)