mainboard/intel: Add Skylake based Kunimitsu board
Initial files to support the Kunimitsu board. Matches chromium tree at 927026db This board uses the Skylake FSP 1.1 image and does not build without the FspUpdVpd.h file. BRANCH=none BUG=None TEST=Build and run ChromeOS on kunimitsu Change-Id: I1017a66bc811af51a0921e864b589ce2cb618082 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10836 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Lee Leahy
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src/mainboard/intel/kunimitsu/gpio.h
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src/mainboard/intel/kunimitsu/gpio.h
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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* Copyright (C) 2015 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef _GPIO_H_
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#define _GPIO_H_
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#include <soc/gpio.h>
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const GPIO_INIT_CONFIG GpioTableKunimitsu[] = {
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{GPIO_LP_GPP_A0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_A1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_A2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioTermNone}},
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{GPIO_LP_GPP_A3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_A4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_A5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_A6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_A8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_A9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_A16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_A17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntEdge, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, (GpioIntApic|GpioIntLevel), GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B15, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut,
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GpioOutLow, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B16, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntEdge, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B17, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_B22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut,
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GpioOutLow,GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C6, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut,
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GpioOutHigh,GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut,
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GpioOutLow,GpioIntDis, GpioResetDeep, GpioTermWpd20K}},
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{GPIO_LP_GPP_C12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C13, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C14, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C15, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_C22, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut,
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GpioOutHigh,GpioIntDis, GpioResetDeep, GpioTermWpd20K}},
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{GPIO_LP_GPP_C23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermWpu20K}},
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{GPIO_LP_GPP_D10, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut,
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GpioOutLow,GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_D11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut,
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GpioOutLow,GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_D14, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntEdge, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_D17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_D18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_D19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_D20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_D23, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E0, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntEdge, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, (GpioIntApic|GpioIntLevel), GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E15, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntEdge, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E16, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntEdge, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_E23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut,
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GpioOutHigh,GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F10, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInInv,
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GpioOutDefault, GpioIntApic | GpioIntEdge, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_F23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_G0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_G1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_G2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_G3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_G4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_G5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPP_G6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntEdge, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPD1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPD2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntEdge, GpioResetDeep, GpioTermNone}},
|
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{GPIO_LP_GPD3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
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GpioOutDefault, GpioIntLevel, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPD4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPD5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermNone}},
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{GPIO_LP_GPD8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirOut,
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GpioOutLow,GpioIntDis, GpioResetDeep, GpioTermNone}},
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{END_OF_GPIO_TABLE, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirNone,
|
||||
GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}},
|
||||
};
|
||||
#endif
|
||||
Reference in New Issue
Block a user