sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

cpu/amd/mtrr: Remove topmem global variables

Browse Source 
The comments are not correct anymore. With AGESA there is no need to
synchronize TOM_MEMx msr's between AP's. It's also not the best place
to do so anyway.

Change-Id: Iecbe1553035680b7c3780338070b852606d74d15
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58693
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Arthur Heymans
2021-10-28 12:35:39 +02:00
committed by Felix Held
parent b0db82dd24
commit c435038c55
8 changed files with 16 additions and 82 deletions
Download Patch File Download Diff File Expand all files Collapse all files

45
src/cpu/amd/mtrr/amd_mtrr.c
View File

@@ -3,54 +3,11 @@
#include <amdblocks/biosram.h>
#include <console/console.h>
#include <device/device.h>
#include <arch/cpu.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/x86/cache.h>
/* These will likely move to some device node or cbmem. */
static uint64_t amd_topmem = 0;
static uint64_t amd_topmem2 = 0;
uint64_t bsp_topmem(void)
{
return amd_topmem;
}
uint64_t bsp_topmem2(void)
{
return amd_topmem2;
}
/* Take a copy of BSP CPUs TOP_MEM and TOP_MEM2 registers,
* so they can be distributed to AP CPUs. Not strictly MTRRs,
* but this is not that bad a place to have this code.
*/
void setup_bsp_ramtop(void)
{
msr_t msr, msr2;
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk(BIOS_INFO,
"%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
__func__, msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk(BIOS_INFO,
"%s, TOP MEM2: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
__func__, msr2.lo, msr2.hi);
amd_topmem = (uint64_t) msr.hi << 32 | msr.lo;
amd_topmem2 = (uint64_t) msr2.hi << 32 | msr2.lo;
}
void add_uma_resource_below_tolm(struct device *nb, int idx)
{
uint32_t topmem = bsp_topmem();
uint32_t topmem = amd_topmem();
uint32_t top_of_cacheable = restore_top_of_low_cacheable();
if (top_of_cacheable == topmem)