cpu/amd/mtrr: Remove topmem global variables
The comments are not correct anymore. With AGESA there is no need to synchronize TOM_MEMx msr's between AP's. It's also not the best place to do so anyway. Change-Id: Iecbe1553035680b7c3780338070b852606d74d15 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58693 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
committed by
Felix Held
parent
b0db82dd24
commit
c435038c55
@@ -66,10 +66,16 @@ static __always_inline void wrmsr_amd(unsigned int index, msr_t msr)
|
||||
);
|
||||
}
|
||||
|
||||
/* To distribute topmem MSRs to APs. */
|
||||
void setup_bsp_ramtop(void);
|
||||
uint64_t bsp_topmem(void);
|
||||
uint64_t bsp_topmem2(void);
|
||||
static inline uint64_t amd_topmem(void)
|
||||
{
|
||||
return rdmsr(TOP_MEM).lo;
|
||||
}
|
||||
|
||||
static inline uint64_t amd_topmem2(void)
|
||||
{
|
||||
msr_t msr = rdmsr(TOP_MEM2);
|
||||
return (uint64_t)msr.hi << 32 | msr.lo;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CPU_AMD_MTRR_H */
|
||||
|
||||
Reference in New Issue
Block a user