cpu/x86: Move checking for MTRR's as a proxy for proper CPU reset
Checking for empty MTRR_DEF_TYPE_MSR as a proxy for proper CPU reset is common across multiple platforms. Therefore place it in a common location. Change-Id: I81d82fb9fe27cd9de6085251fe1a5685cdd651fc Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32319 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
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committed by
Martin Roth
parent
0800194f95
commit
c4772b9fd7
@@ -1,4 +1,5 @@
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/cache_as_ram.S
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += ../../../../../cpu/x86/early_reset.S
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bootblock-$(CONFIG_FSP_CAR)+= car/cache_as_ram_fsp.S
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c
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@@ -28,21 +28,8 @@ bootblock_pre_c_entry:
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post_code(0x20)
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/*
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* Use the MTRR default type MSR as a proxy for detecting INIT#.
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* Reset the system if any known bits are set in that MSR. That is
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* an indication of the CPU not being properly reset.
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*/
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check_for_clean_reset:
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mov $MTRR_DEF_TYPE_MSR, %ecx
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rdmsr
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and $(MTRR_DEF_TYPE_EN | MTRR_DEF_TYPE_FIX_EN), %eax
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cmp $0, %eax
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jz no_reset
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/* perform warm reset */
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movw $0xcf9, %dx
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movb $0x06, %al
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outb %al, %dx
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movl $no_reset, %esp /* return address */
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jmp check_mtrr /* Check if CPU properly reset */
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no_reset:
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post_code(0x21)
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