enable LPC decoding for 1 MB more addresss, for supporting SST49LF00xA/B

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

util/flash_and_burn/sst_fwhub.c

@@ -80,6 +80,7 @@ int probe_sst_fwhub(struct flashchip *flash)
 	myusec_delay(10);
 
 	// we need to mmap the write-protect space. 
+	printf("mapping control register at %x\n", 0 - 0x400000 -size);
 	bios = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
 		    flash->fd_mem, (off_t) (0 - 0x400000 - size));
 	if (bios == MAP_FAILED) {