sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Kill lvds_num_lanes

Browse Source 
Only one value would work with corresponding gma code currently (which one
depends on board). Going forward, it's possible to compute which number can
be used, so there is no need to keep this info around.

Change-Id: Iadc77ef94b02f892860e3ae8d70a0a792758565d
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/11862
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Vladimir Serbinenko
2015-10-11 02:05:55 +02:00
parent 551cff08d5
commit c48f5ef3cc
16 changed files with 4 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
util/autoport/sandybridge.go
View File

@@ -16,13 +16,9 @@ func (i sandybridgemc) Scan(ctx Context, addr PCIDevData) {
pchLVDS := inteltool.IGD[0xe1180]
dualChannel := pchLVDS&(3<<2) == (3 << 2)
pipe := (pchLVDS >> 30) & 1
data_m1 := inteltool.IGD[0x60030+0x1000*pipe] & 0xffffff
data_n1 := inteltool.IGD[0x60034+0x1000*pipe]
link_m1 := inteltool.IGD[0x60040+0x1000*pipe]
link_n1 := inteltool.IGD[0x60044+0x1000*pipe]
data_factor := float32(data_m1) / float32(data_n1)
link_factor := float32(link_m1) / float32(link_n1)
num_lanes := uint32((link_factor/data_factor)*18.0/8.0 + 0.5)
fp0 := inteltool.IGD[0xc6040+8*pipe]
dpll := inteltool.IGD[0xc6014+4*pipe]
pixel_m2 := fp0 & 0xff
@@ -54,7 +50,6 @@ func (i sandybridgemc) Scan(ctx Context, addr PCIDevData) {
"gpu_cpu_backlight": FormatHex32(inteltool.IGD[0x48254]),
"gpu_pch_backlight": FormatHex32((inteltool.IGD[0xc8254] >> 16) * 0x10001),
"gfx.use_spread_spectrum_clock": FormatBool((inteltool.IGD[0xc6200]>>12)&1 != 0),
"gfx.lvds_num_lanes": FormatInt32(num_lanes),
"gfx.link_frequency_270_mhz": FormatBool(link_frequency > 200000),
/* FIXME:XX hardcoded. */
"gfx.ndid": "3",