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soc/intel/common/block: Add common chip config block

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Adding common chip config structure which will be used to return data to
common code. When common code requires soc data, code used to fetch
entire soc config structure. With this change, common code will only get
the data/structure which is required by common code and not entire
config.

For now, adding i2c, gspi and lockdown configuration which will be used
by common code.

BUG=none
BRANCH=b:78109109
TEST=compile code for APL/SKL/CNL. Boot using SKL/APL/CNL and check
values are returned properly using common structure.

Change-Id: I7f1671e064782397d3ace066a08bf1333192b21a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/26189
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Hannah Williams <hannah.williams@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik
2018-05-09 14:55:09 +05:30
parent f513cebd8b
commit c4986eb7f4
52 changed files with 1022 additions and 734 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
src/soc/intel/apollolake/gspi.c
View File

@ -24,19 +24,10 @@
const struct gspi_cfg *gspi_get_soc_cfg(void)
{
DEVTREE_CONST struct soc_intel_apollolake_config *config;
int devfn = SA_DEVFN_ROOT;
DEVTREE_CONST struct device *dev = dev_find_slot(0, devfn);
const struct soc_intel_common_config *common_config;
common_config = chip_get_common_soc_structure();
if (!dev || !dev->chip_info) {
printk(BIOS_ERR, "%s: Could not find SoC devicetree config!\n",
__func__);
return NULL;
}
config = dev->chip_info;
return &config->gspi[0];
return &common_config->gspi[0];
}
uintptr_t gspi_get_soc_early_base(void)