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util/spd_tools: Add support for LP5X SPDs

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This commit adds support for LP5X SPDs. The SPD format is identical to
LP5 except that the memory type is set to 0x15 instead of 0x13. Since
they are essentially the same, LP5/5X parts share the same parts JSON
file and SPD directory. LP5X parts are distinguished by the optional
`lp5x` attribute. This commit also updates two existing LP5X memory
parts with the correct attribute.

BUG=b:242765117
TEST=Generated SPDs, verified that SPDs generated from LP5X parts match
their LP5 counterparts except for memory type byte.

Signed-off-by: Robert Zieba <robertzieba@google.com>
Change-Id: I67df22bc3fd8ea45fe4dad16b8579351eb4d0d8b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66839
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
This commit is contained in:
Robert Zieba
2022-08-23 14:14:16 -06:00
committed by Martin L Roth
parent 724c0cd5b4
commit c4d77128c5
6 changed files with 39 additions and 10 deletions
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9
util/spd_tools/README.md
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@@ -8,9 +8,9 @@ The memory technologies currently supported are:
* LPDDR4x - based on the JESD209-4C spec and Intel recommendations
(docs #616599, #610202, #634730).
* DDR4 - based on the JESD79-4C and Jedec 4.1.2.L-5 R29 v103 specs.
* LPDDR5 - based on the LPDDR5 spec JESD209-5B, the SPD spec SPD4.1.2.M-2 (the
LPDDR3/4 spec is used since JEDEC has not released an SPD spec for LPDDR5),
and Intel recommendations in advisory #616599.
* LPDDR5/5X - based on the LPDDR5 spec JESD209-5B, the SPD spec SPD4.1.2.M-2
(the LPDDR3/4 spec is used since JEDEC has not released an SPD spec for
LPDDR5), and Intel recommendations in advisory #616599.
There are two tools provided to assist with generating SPDs and Makefiles to
integrate into the coreboot build. These tools can also be used to allocate DRAM
@@ -317,6 +317,9 @@ string like "9 10 11 12 14".
#### Optional
* `lp5x`: If this is an LP5X part. SPD format is identical for LP5/5X aside
from the memory type byte.
* `trfcabNs`: Minimum Refresh Recovery Delay Time (tRFCab) for all banks in
nanoseconds. As per JESD209-5B, this is dependent on the density per die.
Default values used: