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cpu/intel: Rename socket_mPGA478MN to socket_p

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These marketing names are much easier to distinguish. My
mnemonic: Socket M => up to Merom, Socket P => up to Penryn.

Change-Id: I3c2a59596cf7f3cd763bd79962ad326ab080677b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/31645
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nico Huber
2019-02-27 14:32:23 +01:00
committed by Patrick Georgi
parent 1083a4d232
commit c570a0e713
6 changed files with 6 additions and 6 deletions
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2
src/cpu/intel/Kconfig
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@@ -21,7 +21,7 @@ source src/cpu/intel/socket_BGA956/Kconfig
source src/cpu/intel/socket_BGA1284/Kconfig source src/cpu/intel/socket_BGA1284/Kconfig
source src/cpu/intel/socket_FCBGA559/Kconfig source src/cpu/intel/socket_FCBGA559/Kconfig
source src/cpu/intel/socket_m/Kconfig source src/cpu/intel/socket_m/Kconfig
source src/cpu/intel/socket_mPGA478MN/Kconfig source src/cpu/intel/socket_p/Kconfig
source src/cpu/intel/socket_mPGA604/Kconfig source src/cpu/intel/socket_mPGA604/Kconfig
source src/cpu/intel/socket_441/Kconfig source src/cpu/intel/socket_441/Kconfig
source src/cpu/intel/socket_LGA775/Kconfig source src/cpu/intel/socket_LGA775/Kconfig

2
src/cpu/intel/Makefile.inc
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@@ -9,7 +9,7 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA956) += socket_BGA956
subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA1284) += socket_BGA1284 subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA1284) += socket_BGA1284
subdirs-$(CONFIG_CPU_INTEL_SOCKET_FCBGA559) += socket_FCBGA559 subdirs-$(CONFIG_CPU_INTEL_SOCKET_FCBGA559) += socket_FCBGA559
subdirs-$(CONFIG_CPU_INTEL_SOCKET_M) += socket_m subdirs-$(CONFIG_CPU_INTEL_SOCKET_M) += socket_m
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478MN) += socket_mPGA478MN subdirs-$(CONFIG_CPU_INTEL_SOCKET_P) += socket_p
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_NEHALEM) += model_2065x subdirs-$(CONFIG_NORTHBRIDGE_INTEL_NEHALEM) += model_2065x
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += model_206ax subdirs-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += model_206ax

4
src/cpu/intel/socket_mPGA478MN/Kconfig → src/cpu/intel/socket_p/Kconfig
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@@ -1,11 +1,11 @@
config CPU_INTEL_SOCKET_MPGA478MN config CPU_INTEL_SOCKET_P
bool bool
select CPU_INTEL_MODEL_1067X select CPU_INTEL_MODEL_1067X
select CPU_INTEL_MODEL_6FX select CPU_INTEL_MODEL_6FX
select MMX select MMX
select SSE select SSE
if CPU_INTEL_SOCKET_MPGA478MN if CPU_INTEL_SOCKET_P
config DCACHE_RAM_BASE config DCACHE_RAM_BASE
hex hex

0
src/cpu/intel/socket_mPGA478MN/Makefile.inc → src/cpu/intel/socket_p/Makefile.inc
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2
src/mainboard/lenovo/t400/Kconfig
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@@ -4,7 +4,7 @@ if BOARD_LENOVO_T400 || BOARD_LENOVO_T500 || BOARD_LENOVO_R400 \
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select CPU_INTEL_SOCKET_MPGA478MN select CPU_INTEL_SOCKET_P
select NORTHBRIDGE_INTEL_GM45 select NORTHBRIDGE_INTEL_GM45
select SOUTHBRIDGE_INTEL_I82801IX select SOUTHBRIDGE_INTEL_I82801IX
select EC_LENOVO_PMH7 select EC_LENOVO_PMH7

2
src/mainboard/lenovo/t400/devicetree.cb
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@@ -6,7 +6,7 @@ chip northbridge/intel/gm45
register "gfx.use_spread_spectrum_clock" = "1" register "gfx.use_spread_spectrum_clock" = "1"
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_mPGA478MN chip cpu/intel/socket_p
device lapic 0 on end device lapic 0 on end
end end
chip cpu/intel/model_1067x chip cpu/intel/model_1067x