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post_code: add post code for video initialization failure

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Add a new post code POST_VIDEO_FAILURE used when the Intel FSP silicon
initialization returns an error when graphics was also initialized.

BUG=b:124401932
BRANCH=sarien
TEST=build coreboot for sarien and arcada platforms

Change-Id: Ibc7f7defbed34038f445949010a37c8e368aae20
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Keith Short
2019-05-10 11:14:31 -06:00
committed by Duncan Laurie
parent 15588b03b3
commit c58e3bd90a
3 changed files with 21 additions and 1 deletions
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Documentation/POSTCODES
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@@ -21,6 +21,7 @@ This is an (incomplete) list of POST codes emitted by coreboot v4.
0xe2 Vendor binary (e.g. FSP) generated a fatal error
0xe3 RAM could not be initialized
0xe4 Critical hardware component could not initialize
0xe5 Video subsystem failed to initialize
0xf8 Entry into elf boot
0xf3 Jumping to payload