nb/intel/ironlake: Add Generic Non-Core PCI device definition

Tested with BUILD_TIMELESS=1, Packard Bell MS2290 does not change.

Change-Id: I8feff0d71ad70ac994e29b238d35e2c73aa92ecd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43739
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons
2020-07-22 18:21:43 +02:00
committed by Patrick Georgi
parent a457e35237
commit c642a0d894
3 changed files with 9 additions and 4 deletions

View File

@@ -47,6 +47,11 @@
#include "hostbridge_regs.h"
/*
* Generic Non-Core Registers
*/
#define QPI_NON_CORE PCI_DEV(QUICKPATH_BUS, 0, 0)
/*
* SAD - System Address Decoder
*/