Add support for the NVIDIA MCP55 southbridge.
Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Yinghai Lu <yinghai.lu@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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committed by
Stefan Reinauer
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097d9a2d57
commit
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36
src/southbridge/nvidia/mcp55/id.inc
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36
src/southbridge/nvidia/mcp55/id.inc
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 AMD
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* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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.section ".id", "a", @progbits
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.globl __id_start
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__id_start:
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vendor:
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.asciz MAINBOARD_VENDOR
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part:
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.asciz MAINBOARD_PART_NUMBER
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.long __id_end + 0x80 - vendor /* Reverse offset to the vendor id */
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.long __id_end + 0x80 - part /* Reverse offset to the part number */
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.long PAYLOAD_SIZE + ROM_IMAGE_SIZE /* Size of this romimage */
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.globl __id_end
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__id_end:
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.previous
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