Add support for the NVIDIA MCP55 southbridge.
Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Yinghai Lu <yinghai.lu@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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committed by
Stefan Reinauer
parent
097d9a2d57
commit
c65bd562a8
96
src/southbridge/nvidia/mcp55/mcp55_ide.c
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96
src/southbridge/nvidia/mcp55/mcp55_ide.c
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2004 Tyan Computer
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* Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
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* Copyright (C) 2006,2007 AMD
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* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include "mcp55.h"
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static void ide_init(struct device *dev)
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{
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struct southbridge_nvidia_mcp55_config *conf;
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/* Enable ide devices so the linux ide driver will work */
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uint32_t dword;
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uint16_t word;
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uint8_t byte;
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conf = dev->chip_info;
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word = pci_read_config16(dev, 0x50);
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/* Ensure prefetch is disabled */
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word &= ~((1 << 15) | (1 << 13));
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if (conf->ide1_enable) {
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/* Enable secondary ide interface */
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word |= (1<<0);
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printk_debug("IDE1 \t");
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}
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if (conf->ide0_enable) {
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/* Enable primary ide interface */
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word |= (1<<1);
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printk_debug("IDE0\n");
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}
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word |= (1<<12);
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word |= (1<<14);
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pci_write_config16(dev, 0x50, word);
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byte = 0x20 ; // Latency: 64-->32
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pci_write_config8(dev, 0xd, byte);
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dword = pci_read_config32(dev, 0xf8);
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dword |= 12;
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pci_write_config32(dev, 0xf8, dword);
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#if CONFIG_PCI_ROM_RUN == 1
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pci_dev_init(dev);
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#endif
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}
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static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
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{
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pci_write_config32(dev, 0x40,
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((device & 0xffff) << 16) | (vendor & 0xffff));
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}
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static struct pci_operations lops_pci = {
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.set_subsystem = lpci_set_subsystem,
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};
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static struct device_operations ide_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = ide_init,
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.scan_bus = 0,
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// .enable = mcp55_enable,
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.ops_pci = &lops_pci,
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};
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static struct pci_driver ide_driver __pci_driver = {
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.ops = &ide_ops,
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_MCP55_IDE,
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};
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