tpm: Refactor TPM Kconfig dimensions

Break TPM related Kconfig into the following dimensions:

TPM transport support:
config CRB_TPM
config I2C_TPM
config SPI_TPM
config MEMORY_MAPPED_TPM (new)

TPM brand, not defining any of these is valid, and result in "generic" support:
config TPM_ATMEL (new)
config TPM_GOOGLE (new)
config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE)
config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE)

What protocol the TPM chip supports:
config MAINBOARD_HAS_TPM1
config MAINBOARD_HAS_TPM2

What the user chooses to compile (restricted by the above):
config NO_TPM
config TPM1
config TPM2

The following Kconfigs will be replaced as indicated:
config TPM_CR50 -> TPM_GOOGLE
config MAINBOARD_HAS_CRB_TPM -> CRB_TPM
config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL
config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE
config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL
config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM
config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL
config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE

Signed-off-by: Jes B. Klinke <jbk@chromium.org>
Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Jes B. Klinke
2022-04-19 14:00:33 -07:00
committed by Julius Werner
parent 0b71099f65
commit c6b041a12e
159 changed files with 260 additions and 289 deletions

View File

@@ -1,17 +1,11 @@
config CRB_TPM
bool
default n
help
CRB TPM driver is enabled!
Mainboard has Command Response Buffer support
config CRB_TPM_BASE_ADDRESS
hex
default 0xfed40000
help
Base Address of the CRB TPM Command Structure
config MAINBOARD_HAS_CRB_TPM
bool
default n
select CRB_TPM
help
Mainboard has Command Response Buffer support

View File

@@ -1,5 +1,3 @@
bootblock-$(CONFIG_CRB_TPM) += tis.c tpm.c
verstage-$(CONFIG_CRB_TPM) += tis.c tpm.c
romstage-$(CONFIG_CRB_TPM) += tis.c tpm.c
ramstage-$(CONFIG_CRB_TPM) += tis.c tpm.c
postcar-$(CONFIG_CRB_TPM) += tis.c tpm.c
ifeq ($(CONFIG_CRB_TPM),y)
all-y += tis.c tpm.c
endif