cpu/intel/microcode: Support update before CAR entry

Change-Id: Ie3c2d2e1bc79dcaffd9901e17f83ceeaabd1d659
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30682
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

src/cpu/intel/Kconfig

@@ -35,3 +35,4 @@ source src/cpu/intel/socket_rPGA989/Kconfig
 source src/cpu/intel/fit/Kconfig
 source src/cpu/intel/turbo/Kconfig
 source src/cpu/intel/common/Kconfig
+source src/cpu/intel/microcode/Kconfig

src/cpu/intel/microcode/Kconfig

@@ -0,0 +1,7 @@
+config MICROCODE_UPDATE_PRE_RAM
+	bool
+	depends on SUPPORT_CPU_UCODE_IN_CBFS
+	default y if C_ENVIRONMENT_BOOTBLOCK
+	help
+	  Select this option if you want to update the microcode
+	  during the cache as ram setup.

src/cpu/intel/microcode/Makefile.inc

@@ -1,6 +1,5 @@
-################################################################################
+bootblock-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += microcode_asm.S
-## One small file with the awesome super-power of updating the CPU microcode
+romstage-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += microcode_asm.S
-## directly from CBFS. You have been WARNED!!!
+
-################################################################################
 ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
 romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c