* Use latest version of intel microcodes from their Linux drivers page for
models 6ex and 6fx (core and core2 solo and duo). Also, use the names suggested by Intel for the microcode files instead our short version of it. This allows to create new microcode patches with a simple set of scripts. * some minor cpu setup fixes for c and p states Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Stefan Reinauer
parent
9cf95bfc64
commit
c7757f20ac
@@ -15,14 +15,14 @@ option FALLBACK_SIZE=1024*512
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romimage "normal"
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option USE_FALLBACK_IMAGE=0
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option ROM_IMAGE_SIZE=0x1a000
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option ROM_IMAGE_SIZE=0x24000
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option COREBOOT_EXTRA_VERSION=".0-normal"
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payload __PAYLOAD__
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end
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romimage "fallback"
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option USE_FALLBACK_IMAGE=1
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option ROM_IMAGE_SIZE=0x1a000
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option ROM_IMAGE_SIZE=0x24000
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option COREBOOT_EXTRA_VERSION=".0-fallback"
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payload __PAYLOAD__
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end
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