soc/intel/meteorlake: Account for GSPI2 everywhere

Commit e54a8fd432 (soc/intel/meteorlake:
Add entry for GSPI2 device) added an entry for the GSPI2 device in the
devicetree, but did not add any other entries. Ensure that the rest of
the code is aware of the GSPI2 device to avoid any problems.

Change-Id: Ib59bd289751bd96402c4adc61ffbee3bebe0edb0
Found-by: Coverity CID 1490681
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65916
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
This commit is contained in:
Angel Pons
2022-07-16 12:37:38 +02:00
committed by Felix Held
parent 10cd06b1c7
commit c7c746c3b2
5 changed files with 8 additions and 0 deletions

View File

@@ -10,6 +10,8 @@ int gspi_soc_bus_to_devfn(unsigned int gspi_bus)
return PCI_DEVFN_GSPI0;
case 1:
return PCI_DEVFN_GSPI1;
case 2:
return PCI_DEVFN_GSPI2;
}
return -1;
}