soc/intel/common/opregion: Get rid of opregion.c
Get rid of custom opregion implementation and use drivers/intel/gma/opregion implementation instead. Test: boot Windows 10 on google/chell and google/edgar using Tianocore payload with GOP init, observe Intel graphics driver loaded and functional. Change-Id: I5f78e9030df12da5369d142dda5c59e576ebcef7 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/21703 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
committed by
Martin Roth
parent
0bcd86a14a
commit
c7edf18f7c
@@ -94,7 +94,6 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK_SMM
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select SOC_INTEL_COMMON_BLOCK_SPI
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select SOC_INTEL_COMMON_BLOCK_CSE
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select SOC_INTEL_COMMON_GFX_OPREGION
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select UDELAY_TSC
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select TSC_CONSTANT_RATE
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select TSC_MONOTONIC_TIMER
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@@ -106,6 +105,8 @@ config CPU_SPECIFIC_OPTIONS
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select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP
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select HAVE_FSP_GOP
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select NO_UART_ON_SUPERIO
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select INTEL_GMA_ACPI
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select INTEL_GMA_SWSMISCI
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config CHROMEOS
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select CHROMEOS_RAMOOPS_DYNAMIC
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@@ -21,7 +21,7 @@
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#include <device/device.h>
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#include <device/pci.h>
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#include <intelblocks/graphics.h>
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#include <soc/intel/common/opregion.h>
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#include <drivers/intel/gma/opregion.h>
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uintptr_t fsp_soc_get_igd_bar(void)
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{
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@@ -32,45 +32,15 @@ uintptr_t graphics_soc_write_acpi_opregion(struct device *device,
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uintptr_t current, struct acpi_rsdp *rsdp)
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{
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igd_opregion_t *opregion;
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uint16_t reg16;
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printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
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opregion = (igd_opregion_t *)current;
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if (init_igd_opregion(opregion) != CB_SUCCESS)
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if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS)
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return current;
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/* FIXME: Add platform specific mailbox initialization */
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current += sizeof(igd_opregion_t);
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opregion->mailbox1.clid = 1;
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/* TODO Initialize Mailbox 3 */
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opregion->mailbox3.bclp = IGD_BACKLIGHT_BRIGHTNESS;
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opregion->mailbox3.pfit = IGD_FIELD_VALID | IGD_PFIT_STRETCH;
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opregion->mailbox3.pcft = 0; /* should be (IMON << 1) & 0x3e */
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opregion->mailbox3.cblv = IGD_FIELD_VALID | IGD_INITIAL_BRIGHTNESS;
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opregion->mailbox3.bclm[0] = IGD_WORD_FIELD_VALID + 0x0000;
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opregion->mailbox3.bclm[1] = IGD_WORD_FIELD_VALID + 0x0a19;
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opregion->mailbox3.bclm[2] = IGD_WORD_FIELD_VALID + 0x1433;
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opregion->mailbox3.bclm[3] = IGD_WORD_FIELD_VALID + 0x1e4c;
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opregion->mailbox3.bclm[4] = IGD_WORD_FIELD_VALID + 0x2866;
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opregion->mailbox3.bclm[5] = IGD_WORD_FIELD_VALID + 0x327f;
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opregion->mailbox3.bclm[6] = IGD_WORD_FIELD_VALID + 0x3c99;
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opregion->mailbox3.bclm[7] = IGD_WORD_FIELD_VALID + 0x46b2;
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opregion->mailbox3.bclm[8] = IGD_WORD_FIELD_VALID + 0x50cc;
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opregion->mailbox3.bclm[9] = IGD_WORD_FIELD_VALID + 0x5ae5;
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opregion->mailbox3.bclm[10] = IGD_WORD_FIELD_VALID + 0x64ff;
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/*
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* TODO This needs to happen in S3 resume, too.
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* Maybe it should move to the finalize handler.
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*/
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pci_write_config32(device, ASLS, (uintptr_t)opregion);
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reg16 = pci_read_config16(device, SWSCI);
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reg16 &= ~(1 << 0);
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reg16 |= (1 << 15);
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pci_write_config16(device, SWSCI, reg16);
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return acpi_align_current(current);
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}
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