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soc/intel/common/opregion: Get rid of opregion.c

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Get rid of custom opregion implementation and use drivers/intel/gma/opregion
implementation instead.

Test: boot Windows 10 on google/chell and google/edgar using Tianocore
payload with GOP init, observe Intel graphics driver loaded and functional.

Change-Id: I5f78e9030df12da5369d142dda5c59e576ebcef7
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/21703
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph
2017-09-26 19:34:35 +02:00
committed by Martin Roth
parent 0bcd86a14a
commit c7edf18f7c
13 changed files with 15 additions and 203 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
src/soc/intel/skylake/graphics.c
View File

@@ -18,7 +18,7 @@
#include <device/pci.h>
#include <drivers/intel/gma/i915_reg.h>
#include <intelblocks/graphics.h>
#include <soc/intel/common/opregion.h>
#include <drivers/intel/gma/opregion.h>
#include <soc/ramstage.h>
uintptr_t fsp_soc_get_igd_bar(void)
@@ -65,33 +65,7 @@ void graphics_soc_init(struct device *dev)
/* Initialize IGD OpRegion, called from ACPI code */
static void update_igd_opregion(igd_opregion_t *opregion)
{
u16 reg16;
opregion->mailbox1.clid = 1;
/* Initialize Mailbox 3 */
opregion->mailbox3.bclp = IGD_BACKLIGHT_BRIGHTNESS;
opregion->mailbox3.pfit = IGD_FIELD_VALID | IGD_PFIT_STRETCH;
opregion->mailbox3.pcft = 0; /* should be (IMON << 1) & 0x3e */
opregion->mailbox3.cblv = IGD_FIELD_VALID | IGD_INITIAL_BRIGHTNESS;
opregion->mailbox3.bclm[0] = IGD_WORD_FIELD_VALID + 0x0000;
opregion->mailbox3.bclm[1] = IGD_WORD_FIELD_VALID + 0x0a19;
opregion->mailbox3.bclm[2] = IGD_WORD_FIELD_VALID + 0x1433;
opregion->mailbox3.bclm[3] = IGD_WORD_FIELD_VALID + 0x1e4c;
opregion->mailbox3.bclm[4] = IGD_WORD_FIELD_VALID + 0x2866;
opregion->mailbox3.bclm[5] = IGD_WORD_FIELD_VALID + 0x327f;
opregion->mailbox3.bclm[6] = IGD_WORD_FIELD_VALID + 0x3c99;
opregion->mailbox3.bclm[7] = IGD_WORD_FIELD_VALID + 0x46b2;
opregion->mailbox3.bclm[8] = IGD_WORD_FIELD_VALID + 0x50cc;
opregion->mailbox3.bclm[9] = IGD_WORD_FIELD_VALID + 0x5ae5;
opregion->mailbox3.bclm[10] = IGD_WORD_FIELD_VALID + 0x64ff;
/* TODO This may need to happen in S3 resume */
pci_write_config32(SA_DEV_IGD, ASLS, (u32)opregion);
reg16 = pci_read_config16(SA_DEV_IGD, SWSCI);
reg16 &= ~GSSCIE;
reg16 |= SMISCISEL;
pci_write_config16(SA_DEV_IGD, SWSCI, reg16);
/* FIXME: Add platform specific mailbox initialization */
}
uintptr_t graphics_soc_write_acpi_opregion(struct device *device,
@@ -110,7 +84,7 @@ uintptr_t graphics_soc_write_acpi_opregion(struct device *device,
printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
opregion = (igd_opregion_t *)current;
if (init_igd_opregion(opregion) != CB_SUCCESS)
if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS)
return current;
update_igd_opregion(opregion);