nb/intel: Don't select VBOOT_SEPARATE_VERSTAGE

Now the bootblock is not limited to 64K so integrating vboot into the
bootblock reduces the binary size.

Change-Id: Ic92ecf8068f327a893d20924685ce571752d379f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52787
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/northbridge/intel/gm45/Kconfig

@@ -16,7 +16,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS
 
 config VBOOT
 	select VBOOT_STARTS_IN_BOOTBLOCK
-	select VBOOT_SEPARATE_VERSTAGE
 
 config CBFS_SIZE
 	hex

src/northbridge/intel/haswell/Kconfig

@@ -14,7 +14,6 @@ config HASWELL_VBOOT_IN_BOOTBLOCK
 	bool "Start verstage in bootblock"
 	default y
 	select VBOOT_STARTS_IN_BOOTBLOCK
-	select VBOOT_SEPARATE_VERSTAGE
 	help
 	  Haswell can either start verstage in a separate stage
 	  right after the bootblock has run or it can start it

src/northbridge/intel/i945/Kconfig

@@ -17,8 +17,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS
 
 config VBOOT
 	select VBOOT_STARTS_IN_BOOTBLOCK
-	select VBOOT_SEPARATE_VERSTAGE
-
 config NORTHBRIDGE_INTEL_SUBTYPE_I945GC
 	def_bool n
 config NORTHBRIDGE_INTEL_SUBTYPE_I945GM

src/northbridge/intel/ironlake/Kconfig

@@ -14,7 +14,6 @@ if NORTHBRIDGE_INTEL_IRONLAKE
 config VBOOT
 	select VBOOT_MUST_REQUEST_DISPLAY
 	select VBOOT_STARTS_IN_BOOTBLOCK
-	select VBOOT_SEPARATE_VERSTAGE
 	# CPU is reset without platform/TPM during romstage
 	select TPM_STARTUP_IGNORE_POSTINIT
 

src/northbridge/intel/sandybridge/Kconfig

@@ -21,7 +21,6 @@ config SANDYBRIDGE_VBOOT_IN_BOOTBLOCK
 	bool "Start verstage in bootblock"
 	default y
 	select VBOOT_STARTS_IN_BOOTBLOCK
-	select VBOOT_SEPARATE_VERSTAGE
 	help
 	  Sandy Bridge can either start verstage in a separate stage
 	  right after the bootblock has run or it can start it