Remove another set of includes from Fam10 romstages:

northbridge/amd/amdht/ht_wrapper.c
northbridge/amd/amdfam10/raminit_amdmct.c
cpu/amd/model_10xxx/fidvid.c
pc80/mc146818rtc_early.c

They are now included by the fam10 chipset code that requires them.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/amd/car/post_cache_as_ram.c

@@ -3,7 +3,9 @@
  */
 #include <string.h>
 #include <arch/stages.h>
+#include <cpu/x86/mtrr.h>
 #include "cpu/amd/car/disable_cache_as_ram.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
 
 static inline void print_debug_pcar(const char *strval, uint32_t val)
 {

src/cpu/amd/model_10xxx/fidvid.c

@@ -18,7 +18,7 @@
  */
 
 #if SET_FIDVID == 1
-#include "../../../northbridge/amd/amdht/AsPsDefs.h"
+#include <northbridge/amd/amdht/AsPsDefs.h>
 
 #define SET_FIDVID_DEBUG 1
 

src/cpu/amd/model_10xxx/init_cpus.c

@@ -25,6 +25,9 @@
 #include <northbridge/amd/amdht/AsPsDefs.h>
 #include <northbridge/amd/amdht/porting.h>
 
+#include <cpu/x86/mtrr/earlymtrr.c>
+#include <northbridge/amd/amdfam10/raminit_amdmct.c>
+
 //it takes the CONFIG_ENABLE_APIC_EXT_ID and CONFIG_APIC_ID_OFFSET and CONFIG_LIFT_BSP_APIC_ID
 #ifndef SET_FIDVID
 	#define SET_FIDVID 1
@@ -976,3 +979,5 @@ static void finalize_node_setup(struct sys_info *sysinfo)
 	}
 #endif
 }
+
+#include "fidvid.c"

src/cpu/amd/quadcore/quadcore.c

@@ -18,6 +18,8 @@
  */
 
 #include <console/console.h>
+#include <pc80/mc146818rtc_early.c>
+#include <northbridge/amd/amdht/ht_wrapper.c>
 
 #ifndef SET_NB_CFG_54
 	#define SET_NB_CFG_54 1