Clean up AMD romstage.c whitespace indent issues

Change-Id: I1713f1a3b548cb8e8ea5cf57eef95486ceb05ab9
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: http://review.coreboot.org/538
Tested-by: build bot (Jenkins)
Reviewed-by: Vikram Narayanan <vikram186@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Marc Jones
2012-01-17 15:41:03 -07:00
committed by Stefan Reinauer
parent db89ec975c
commit c9ea327a45
3 changed files with 183 additions and 179 deletions

View File

@@ -38,80 +38,83 @@
#include <arch/cpu.h> #include <arch/cpu.h>
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
u32 agesawrapper_amdinitmmio (void); u32 agesawrapper_amdinitmmio(void);
u32 agesawrapper_amdinitreset (void); u32 agesawrapper_amdinitreset(void);
u32 agesawrapper_amdinitearly (void); u32 agesawrapper_amdinitearly(void);
u32 agesawrapper_amdinitenv (void); u32 agesawrapper_amdinitenv(void);
u32 agesawrapper_amdinitlate (void); u32 agesawrapper_amdinitlate(void);
u32 agesawrapper_amdinitpost (void); u32 agesawrapper_amdinitpost(void);
u32 agesawrapper_amdinitmid (void); u32 agesawrapper_amdinitmid(void);
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{ {
u32 val; u32 val;
if (!cpu_init_detectedx && boot_cpu()) { if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x30); post_code(0x30);
sb_Poweron_Init(); sb_Poweron_Init();
post_code(0x31); post_code(0x31);
kbc1100_early_init(CONFIG_SIO_PORT); kbc1100_early_init(CONFIG_SIO_PORT);
console_init(); console_init();
} }
/* Halt if there was a built in self test failure */ /* Halt if there was a built in self test failure */
post_code(0x34); post_code(0x34);
report_bist_failure(bist); report_bist_failure(bist);
// Load MPB // Load MPB
val = cpuid_eax(1); val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val); printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx); printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
post_code(0x35); post_code(0x35);
val = agesawrapper_amdinitmmio(); val = agesawrapper_amdinitmmio();
post_code(0x37); post_code(0x37);
val = agesawrapper_amdinitreset(); val = agesawrapper_amdinitreset();
if(val) { if (val) {
printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n", val); printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n",
} val);
}
post_code(0x38); post_code(0x38);
printk(BIOS_DEBUG, "Got past sb800_early_setup\n"); printk(BIOS_DEBUG, "Got past sb800_early_setup\n");
post_code(0x39); post_code(0x39);
val = agesawrapper_amdinitearly (); val = agesawrapper_amdinitearly();
if(val) { if (val) {
printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n", val); printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n",
} val);
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n"); }
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
post_code(0x40); post_code(0x40);
val = agesawrapper_amdinitpost (); val = agesawrapper_amdinitpost();
if(val) { if (val) {
printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n", val); printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n",
} val);
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n"); }
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n");
post_code(0x41); post_code(0x41);
val = agesawrapper_amdinitenv (); val = agesawrapper_amdinitenv();
if(val) { if (val) {
printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n", val); printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n",
} val);
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n"); }
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
/* Initialize i8259 pic */ /* Initialize i8259 pic */
post_code(0x41); post_code(0x41);
setup_i8259 (); setup_i8259();
/* Initialize i8254 timers */ /* Initialize i8254 timers */
post_code(0x42); post_code(0x42);
setup_i8254 (); setup_i8254();
post_code(0x50); post_code(0x50);
copy_and_run(0); copy_and_run(0);
post_code(0x54); // Should never see this post code. post_code(0x54); // Should never see this post code.
} }

View File

@@ -27,7 +27,6 @@
#include "SbEarly.h" #include "SbEarly.h"
#include "agesawrapper.h" #include "agesawrapper.h"
/* Global variables for MB layouts and these will be shared by irqtable mptable /* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default. * and acpi_tables busnum is default.
*/ */
@@ -40,7 +39,7 @@ u8 bus_sb900[3];
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail * please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/ */
u32 pci1234x[] = { u32 pci1234x[] = {
0x0000ff0, 0x0000ff0,
}; };
/* /*
@@ -48,7 +47,7 @@ u32 pci1234x[] = {
* assume every chain only have 4 ht device at most * assume every chain only have 4 ht device at most
*/ */
u32 hcdnx[] = { u32 hcdnx[] = {
0x20202020, 0x20202020,
}; };
u32 bus_type[256]; u32 bus_type[256];
@@ -59,22 +58,20 @@ u32 sbdn_sb900;
static u32 get_bus_conf_done = 0; static u32 get_bus_conf_done = 0;
void get_bus_conf(void) void get_bus_conf(void)
{ {
u32 status; u32 status;
device_t dev; device_t dev;
int i, j; int i, j;
if (get_bus_conf_done == 1) if (get_bus_conf_done == 1)
return; /* do it only once */ return; /* do it only once */
get_bus_conf_done = 1; get_bus_conf_done = 1;
printk(BIOS_DEBUG, "Mainboard - Get_bus_conf.c - get_bus_conf - Start.\n"); printk(BIOS_DEBUG,
"Mainboard - Get_bus_conf.c - get_bus_conf - Start.\n");
/* /*
* This is the call to AmdInitLate. It is really in the wrong place, conceptually, * This is the call to AmdInitLate. It is really in the wrong place, conceptually,
* but functionally within the coreboot model, this is the best place to make the * but functionally within the coreboot model, this is the best place to make the
@@ -90,57 +87,58 @@ void get_bus_conf(void)
* of each of the write functions called prior to the ACPI write functions, so this * of each of the write functions called prior to the ACPI write functions, so this
* becomes the best place for this call. * becomes the best place for this call.
*/ */
status = agesawrapper_amdinitlate(); status = agesawrapper_amdinitlate();
if(status) { if (status) {
printk(BIOS_DEBUG, "agesawrapper_amdinitlate failed: %x \n", status); printk(BIOS_DEBUG, "agesawrapper_amdinitlate failed: %x \n",
} status);
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitlate\n"); }
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitlate\n");
sbdn_sb900 = 0; sbdn_sb900 = 0;
for (i = 0; i < 3; i++) { for (i = 0; i < 3; i++) {
bus_sb900[i] = 0; bus_sb900[i] = 0;
} }
for (i = 0; i < 256; i++) { for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */ bus_type[i] = 0; /* default ISA bus. */
} }
bus_type[0] = 1; /* pci */
bus_type[0] = 1; /* pci */
// bus_sb900[0] = (sysconf.pci1234[0] >> 16) & 0xff; // bus_sb900[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb900[0] = (pci1234x[0] >> 16) & 0xff; bus_sb900[0] = (pci1234x[0] >> 16) & 0xff;
/* sb900 */ /* sb900 */
dev = dev_find_slot(bus_sb900[0], PCI_DEVFN(sbdn_sb900 + 0x14, 4)); dev = dev_find_slot(bus_sb900[0], PCI_DEVFN(sbdn_sb900 + 0x14, 4));
if (dev) {
bus_sb900[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb900[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
if (dev) { for (i = 0; i < 4; i++) {
bus_sb900[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); dev =
dev_find_slot(bus_sb900[0],
PCI_DEVFN(sbdn_sb900 + 0x14, i));
if (dev) {
bus_sb900[2 + i] =
pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
}
for (j = bus_sb900[2]; j < bus_isa; j++)
bus_type[j] = 1;
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); /* I/O APICs: APIC ID Version State Address */
bus_isa++; bus_isa = 10;
for (j = bus_sb900[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
for (i = 0; i < 4; i++) { sb_Late_Post();
dev = dev_find_slot(bus_sb900[0], PCI_DEVFN(sbdn_sb900 + 0x14, i)); printk(BIOS_DEBUG,
if (dev) { "Mainboard - Get_bus_conf.c - get_bus_conf - End.\n");
bus_sb900[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
}
for (j = bus_sb900[2]; j < bus_isa; j++)
bus_type[j] = 1;
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
sb_Late_Post();
printk(BIOS_DEBUG, "Mainboard - Get_bus_conf.c - get_bus_conf - End.\n");
} }

View File

@@ -40,88 +40,91 @@
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{ {
u32 val; u32 val;
post_code(0x35); post_code(0x35);
val = agesawrapper_amdinitmmio(); val = agesawrapper_amdinitmmio();
if(val) { if (val) {
printk(BIOS_DEBUG, "agesawrapper_amdinitmmio failed: %x \n", val); printk(BIOS_DEBUG, "agesawrapper_amdinitmmio failed: %x \n",
} val);
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitmmio\n"); }
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitmmio\n");
if (!cpu_init_detectedx && boot_cpu()) { if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x30); post_code(0x30);
gpioEarlyInit(); gpioEarlyInit();
sb_poweron_init(); sb_poweron_init();
post_code(0x31); post_code(0x31);
kbc1100_early_init(CONFIG_SIO_PORT); kbc1100_early_init(CONFIG_SIO_PORT);
post_code(0x32); post_code(0x32);
uart_init(); uart_init();
post_code(0x33); post_code(0x33);
console_init(); console_init();
} }
/* Halt if there was a built in self test failure */ /* Halt if there was a built in self test failure */
post_code(0x34); post_code(0x34);
report_bist_failure(bist); report_bist_failure(bist);
// Load MPB // Load MPB
val = cpuid_eax(1); val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val); printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx); printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
post_code(0x36); post_code(0x36);
val = agesawrapper_amdinitreset(); val = agesawrapper_amdinitreset();
if(val) { if (val) {
printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n", val); printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n",
} val);
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitreset\n"); }
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitreset\n");
post_code(0x37); post_code(0x37);
val = agesawrapper_amdinitearly (); val = agesawrapper_amdinitearly();
if(val) { if (val) {
printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n", val); printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n",
} val);
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n"); }
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
post_code(0x38); post_code(0x38);
val = agesawrapper_amdinitpost (); val = agesawrapper_amdinitpost();
if(val) { if (val) {
printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n", val); printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n",
} val);
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n"); }
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n");
post_code(0x39); post_code(0x39);
sb_before_pci_init (); sb_before_pci_init();
printk(BIOS_DEBUG, "Got past sb_before_pci_init\n"); printk(BIOS_DEBUG, "Got past sb_before_pci_init\n");
post_code(0x40); post_code(0x40);
val = agesawrapper_amdinitenv (); val = agesawrapper_amdinitenv();
if(val) { if (val) {
printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n", val); printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n",
} val);
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n"); }
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
/* Initialize i8259 pic */ /* Initialize i8259 pic */
post_code(0x41); post_code(0x41);
setup_i8259 (); setup_i8259();
printk(BIOS_DEBUG, "Got past setup_i8259\n"); printk(BIOS_DEBUG, "Got past setup_i8259\n");
/* Initialize i8254 timers */ /* Initialize i8254 timers */
post_code(0x42); post_code(0x42);
setup_i8254 (); setup_i8254();
printk(BIOS_DEBUG, "Got past setup_i8254\n"); printk(BIOS_DEBUG, "Got past setup_i8254\n");
post_code(0x43); post_code(0x43);
copy_and_run(0); copy_and_run(0);
printk(BIOS_DEBUG, "Got past copy_and_run\n"); printk(BIOS_DEBUG, "Got past copy_and_run\n");
post_code(0x44); // Should never see this post code. post_code(0x44); // Should never see this post code.
} }