sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

acpi: Add SSDT pstate helper functions

Browse Source 
Add new generic helper functions for PSS, PCT, XPSS, objects.

BUG=b:155307433
TEST=Boot Morphius and dump SSDT. Confirm PSS and PCT objects appear
as expected and conform to ACPI_6_3_May16.pdf ACPI specification.
Check XPSS against Microsoft "Extended PSS ACPI Method Specification"
XPSS_spec.doc April 2, 2007.
BRANCH=Zork

Change-Id: I1ea218bcee33093481e82390550ff96d9d2cb8b5
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45437
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Jason Glenesk
2020-09-15 21:01:57 -07:00
committed by Felix Held
parent ccbe5307d8
commit ca36aedb4e
3 changed files with 82 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
src/include/acpi/acpi.h
View File

@@ -800,6 +800,26 @@ typedef struct acpi_cstate {
acpi_addr_t resource;
} __packed acpi_cstate_t;
struct acpi_sw_pstate {
u32 core_freq;
u32 power;
u32 transition_latency;
u32 bus_master_latency;
u32 control_value;
u32 status_value;
} __packed;
struct acpi_xpss_sw_pstate {
u64 core_freq;
u64 power;
u64 transition_latency;
u64 bus_master_latency;
u64 control_value;
u64 status_value;
u64 control_mask;
u64 status_mask;
} __packed;
typedef struct acpi_tstate {
u32 percent;
u32 power;

5
src/include/acpi/acpigen.h
View File

@@ -324,6 +324,7 @@ void acpigen_write_STA_ext(const char *namestring);
void acpigen_write_TPC(const char *gnvs_tpc_limit);
void acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat,
u32 busmLat, u32 control, u32 status);
void acpigen_write_pss_object(const struct acpi_sw_pstate *pstate_values, size_t nentries);
typedef enum { SW_ALL = 0xfc, SW_ANY = 0xfd, HW_ALL = 0xfe } PSD_coord;
void acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype);
void acpigen_write_CST_package_entry(acpi_cstate_t *cstate);
@@ -331,6 +332,10 @@ void acpigen_write_CST_package(acpi_cstate_t *entry, int nentries);
typedef enum { CSD_HW_ALL = 0xfe } CSD_coord;
void acpigen_write_CSD_package(u32 domain, u32 numprocs, CSD_coord coordtype,
u32 index);
void acpigen_write_pct_package(const acpi_addr_t *perf_ctrl, const acpi_addr_t *perf_sts);
void acpigen_write_xpss_package(const struct acpi_xpss_sw_pstate *pstate_value);
void acpigen_write_xpss_object(const struct acpi_xpss_sw_pstate *pstate_values,
size_t nentries);
void acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len);
void acpigen_write_processor_package(const char *name,
unsigned int first_core,