From caa8a20d87646ab46b49d985b55175227129fdc8 Mon Sep 17 00:00:00 2001 From: Kane Chen Date: Mon, 8 May 2023 14:25:10 +0800 Subject: [PATCH] soc/intel/alderlake: Hook up CsPiStartHighinEct UPD This commit provides option for board to set CsPiStartHighinEct FSP UPD using a new cs_pi_start_high_in_ect mb_cfg field. BUG=b:279835630 BRANCH=none TEST=CsPiStartHighinEct UPD is set properly Change-Id: I7d0d5f3c782e29fb047ea421e1a5fdfc30bcc26d Signed-off-by: Nick Vaccaro Reviewed-on: https://review.coreboot.org/c/coreboot/+/76354 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/soc/intel/alderlake/include/soc/meminit.h | 4 ++++ src/soc/intel/alderlake/meminit.c | 3 +++ 2 files changed, 7 insertions(+) diff --git a/src/soc/intel/alderlake/include/soc/meminit.h b/src/soc/intel/alderlake/include/soc/meminit.h index bd75636e9b..1d9eaf9414 100644 --- a/src/soc/intel/alderlake/include/soc/meminit.h +++ b/src/soc/intel/alderlake/include/soc/meminit.h @@ -107,6 +107,10 @@ struct mb_cfg { /* Enable/Disable TxDqDqs Retraining for Lp4/Lp5/DDR */ uint8_t LpDdrDqDqsReTraining; + + /* Enable/Disable Cs Pi Start with High value in Ect */ + uint8_t cs_pi_start_high_in_ect; + }; void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg, diff --git a/src/soc/intel/alderlake/meminit.c b/src/soc/intel/alderlake/meminit.c index 862a322a53..2e64e773f8 100644 --- a/src/soc/intel/alderlake/meminit.c +++ b/src/soc/intel/alderlake/meminit.c @@ -240,6 +240,9 @@ void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg, bool dq_dqs_auto_detect = false; FSP_M_CONFIG *mem_cfg = &memupd->FspmConfig; +#if CONFIG(SOC_INTEL_RAPTORLAKE) + mem_cfg->CsPiStartHighinEct = mb_cfg->cs_pi_start_high_in_ect; +#endif mem_cfg->ECT = mb_cfg->ect; mem_cfg->UserBd = mb_cfg->UserBd; set_rcomp_config(mem_cfg, mb_cfg);