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broadwell: Skip steps when disabling PCIe port

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When disabling PCIe ports skip steps if no card is detected.
This prevents the loop from timing out on each empty slot.

BUG=chrome-os-partner:31424
BRANCH=broadwell
TEST=build and boot on samus, check that this code is
no longer timing out when disabling PCIe ports

Change-Id: I84ee0e0e325784b3af06abe70420c07cf6e13ed2
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 4d759e2350dd00ceb7df196ac7008729dc1e4cef
Original-Change-Id: Idd88f0f1191a5465a0d8dcca07b5c3a5c5ca8855
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/240851
Original-Reviewed-by: Wenkai Du <wenkai.du@intel.com>
Original-Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/9489
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Duncan Laurie 2015-01-14 17:30:20 -08:00 committed by Stefan Reinauer
parent cf544ac1f9
commit cad2b7b6e8
1 changed files with 2 additions and 2 deletions
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4
src/soc/intel/broadwell/pcie.c
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@ -321,12 +321,12 @@ static void root_port_commit_config(void)
do { do {
reg32 = pci_read_config32(dev, 0x328); reg32 = pci_read_config32(dev, 0x328);
n++; n++;
if (((reg32 & 0xff000000) == 0x01000000) || (n > 500)) if (((reg32 & 0xff000000) == 0x01000000) || (n > 50))
break; break;
udelay(100); udelay(100);
} while (1); } while (1);
if (n > 500) if (n > 50)
printk(BIOS_DEBUG, "%s: Timeout waiting for 328h\n", printk(BIOS_DEBUG, "%s: Timeout waiting for 328h\n",
dev_path(dev)); dev_path(dev));