sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/meteorlake: Make use of is_devfn_enabled() function

Browse Source 
The patch uses is_devfn_enabled() function to enable the TBT PCIe ports
through FSP-M and FSP-S UPDs. Also, removes unused tbt_pcie_port_disable
array member from soc_intel_meteorlake_config struct.

TEST=Build coreboot for Google/Rex

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: Ie55e196bd8f682864b8f74dbe253f345d7184753
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67831
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Sridhar Siricilla
2022-09-26 12:12:20 +05:30
committed by Martin Roth
parent a0f3b86e13
commit cb4d464633
3 changed files with 6 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/soc/intel/meteorlake/chip.h
View File

@@ -125,7 +125,6 @@ struct soc_intel_meteorlake_config {
uint16_t usb3_wake_enable_bitmap;
/* Program OC pins for TCSS */
struct tcss_port_config tcss_ports[MAX_TYPE_C_PORTS];
uint8_t tbt_pcie_port_disable[4];
/* Validate TBT firmware authenticated and loaded into IMR */
bool tbt_authentication;

7
src/soc/intel/meteorlake/fsp_params.c
View File

@@ -337,11 +337,8 @@ static void fill_fsps_vmd_params(FSP_S_CONFIG *s_cfg,
static void fill_fsps_tbt_params(FSP_S_CONFIG *s_cfg,
const struct soc_intel_meteorlake_config *config)
{
int max_port = get_max_tbt_pcie_port();
memset(s_cfg->ITbtPcieRootPortEn, 0, sizeof(s_cfg->ITbtPcieRootPortEn));
for (int i = 0; i < max_port; i++)
s_cfg->ITbtPcieRootPortEn[i] = !(config->tbt_pcie_port_disable[i]);
for (int i = 0; i < ARRAY_SIZE(s_cfg->ITbtPcieRootPortEn); i++)
s_cfg->ITbtPcieRootPortEn[i] = is_devfn_enabled(PCI_DEVFN_TBT(i));
}
static void fill_fsps_8254_params(FSP_S_CONFIG *s_cfg,

10
src/soc/intel/meteorlake/romstage/fsp_params.c
View File

@@ -226,12 +226,10 @@ static void fill_fspm_tcss_params(FSP_M_CONFIG *m_cfg,
static void fill_fspm_usb4_params(FSP_M_CONFIG *m_cfg,
const struct soc_intel_meteorlake_config *config)
{
memset(&m_cfg->TcssItbtPcie0En, 0, sizeof(m_cfg->TcssItbtPcie0En)*4);
m_cfg->TcssItbtPcie0En = !(config->tbt_pcie_port_disable[0]);
m_cfg->TcssItbtPcie1En = !(config->tbt_pcie_port_disable[1]);
m_cfg->TcssItbtPcie2En = !(config->tbt_pcie_port_disable[2]);
m_cfg->TcssItbtPcie3En = !(config->tbt_pcie_port_disable[3]);
m_cfg->TcssItbtPcie0En = is_devfn_enabled(PCI_DEVFN_TBT0);
m_cfg->TcssItbtPcie1En = is_devfn_enabled(PCI_DEVFN_TBT1);
m_cfg->TcssItbtPcie2En = is_devfn_enabled(PCI_DEVFN_TBT2);
m_cfg->TcssItbtPcie3En = is_devfn_enabled(PCI_DEVFN_TBT3);
}
static void fill_fspm_vtd_params(FSP_M_CONFIG *m_cfg,