add framework for i440bx chipset

add support for NSC pc87351 SuperIO
add Bitworks/IMS manboard config

This is a very basic framework for the i440bx chipset and the 
Bitworks IMS board that uses it.  Most things are 
structure only.

Known issues:
- SMbus reads to the RAM SPD come back
all zero.
- dump_spd_registers() is commented out since it breaks with
the default setting of generic_dump_spd.c where it wants
2 memory controllers.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Richard Smith
2006-07-24 04:25:47 +00:00
parent 4788effb04
commit cb8eab482f
29 changed files with 1811 additions and 0 deletions

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config chip.h
object superio.o

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#ifndef SIO_COM1
#define SIO_COM1_BASE 0x3F8
#endif
#ifndef SIO_COM2
#define SIO_COM2_BASE 0x2F8
#endif
struct chip_operations;
extern struct chip_operations superio_NSC_pc87351_ops;
#include <pc80/keyboard.h>
#include <uart8250.h>
struct superio_NSC_pc87351_config {
struct uart8250 com1, com2;
struct pc_keyboard keyboard;
};

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#define PC87351_FDC 0x00 /* Floppy */
#define PC87351_PP 0x01 /* Parallel port */
#define PC87351_SP2 0x02 /* Com2 */
#define PC87351_SP1 0x03 /* Com1 */
#define PC87351_SWC 0x04 /* System wakeup control */
#define PC87351_KBCM 0x05 /* Mouse */
#define PC87351_KBCK 0x06 /* Keyboard */
#define PC87351_GPIO 0x07 /* General purpose IO */
#define PC87351_FSD 0x08 /* Fan speed device */

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#include <arch/romcc_io.h>
#include "pc87351.h"
static void pc87351_enable_serial(device_t dev, unsigned iobase)
{
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
}

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/* Copyright 2000 AG Electronics Ltd. */
/* Copyright 2003-2004 Linux Networx */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
/*
* Richard A Smith
* I derived this code from the pc87360 device and removed the stuff the 87351
* dosen't do.
*/
#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
#include <string.h>
#include <bitops.h>
#include <uart8250.h>
#include <pc80/keyboard.h>
#include "chip.h"
#include "pc87351.h"
static void init(device_t dev)
{
struct superio_NSC_pc87351_config *conf;
struct resource *res0, *res1;
/* Wishlist handle well known programming interfaces more
* generically.
*/
if (!dev->enabled) {
return;
}
conf = dev->chip_info;
switch(dev->path.u.pnp.device) {
case PC87351_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
case PC87351_SP2:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com2);
break;
case PC87351_KBCK:
res0 = find_resource(dev, PNP_IDX_IO0);
res1 = find_resource(dev, PNP_IDX_IO1);
init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
break;
}
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = pnp_set_resources,
.enable_resources = pnp_enable_resources,
.enable = pnp_enable,
.init = init,
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, PC87351_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC87351_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, PC87351_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, PC87351_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87351_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
{ &ops, PC87351_KBCM, PNP_IRQ0 },
{ &ops, PC87351_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC87351_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87351_FSD, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops,
sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
}
struct chip_operations superio_NSC_pc87351_ops = {
CHIP_NAME("NSC 87351")
.enable_dev = enable_dev,
};