diff --git a/src/soc/intel/xeon_sp/ebg/Makefile.mk b/src/soc/intel/xeon_sp/ebg/Makefile.mk index ac73acbde9..b05c05bbb3 100644 --- a/src/soc/intel/xeon_sp/ebg/Makefile.mk +++ b/src/soc/intel/xeon_sp/ebg/Makefile.mk @@ -2,6 +2,6 @@ bootblock-y += soc_gpio.c soc_pch.c romstage-y += soc_gpio.c soc_pmutil.c soc_pch.c -ramstage-y += lockdown.c soc_gpio.c soc_pch.c soc_pmutil.c +ramstage-y += lockdown.c soc_gpio.c soc_pch.c soc_pmutil.c soc_xhci.c CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/ebg/include diff --git a/src/soc/intel/xeon_sp/spr/include/soc/xhci.h b/src/soc/intel/xeon_sp/ebg/include/soc/xhci.h similarity index 100% rename from src/soc/intel/xeon_sp/spr/include/soc/xhci.h rename to src/soc/intel/xeon_sp/ebg/include/soc/xhci.h diff --git a/src/soc/intel/xeon_sp/spr/xhci.c b/src/soc/intel/xeon_sp/ebg/soc_xhci.c similarity index 92% rename from src/soc/intel/xeon_sp/spr/xhci.c rename to src/soc/intel/xeon_sp/ebg/soc_xhci.c index 544ea16ba9..f8aa37b88d 100644 --- a/src/soc/intel/xeon_sp/spr/xhci.c +++ b/src/soc/intel/xeon_sp/ebg/soc_xhci.c @@ -2,10 +2,13 @@ #include #include -#include +#include #include #include +// XHCI register +#define SYS_BUS_CFG2 0x44 + static uint8_t *get_xhci_bar(void) { const struct resource *res; diff --git a/src/soc/intel/xeon_sp/spr/Makefile.mk b/src/soc/intel/xeon_sp/spr/Makefile.mk index 163b5ea94d..fc8ab1713d 100644 --- a/src/soc/intel/xeon_sp/spr/Makefile.mk +++ b/src/soc/intel/xeon_sp/spr/Makefile.mk @@ -12,7 +12,7 @@ romstage-y += romstage.c soc_util.c ddr.c romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c -ramstage-y += chip.c cpu.c soc_util.c ramstage.c soc_acpi.c xhci.c reset.c +ramstage-y += chip.c cpu.c soc_util.c ramstage.c soc_acpi.c reset.c ramstage-y += crashlog.c ioat.c ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c diff --git a/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h index 09953aa76a..510a67fa6f 100644 --- a/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h +++ b/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h @@ -122,9 +122,6 @@ #define IIO_DFX_TSWCTL0 0x30c #define IIO_DFX_LCK_CTL 0x504 -// XHCI register -#define SYS_BUS_CFG2 0x44 - /* MSM registers */ #define MSM_BUS 0xF2 #define MSM_DEV 3