drivers/pc80/rtc: Separate {get|set}_option() prototypes

Long-term plan is to support loading runtime configuration
from SPI flash as an alternative, so move these prototypes
outside pc80/.

Change-Id: Iad7b03dc985550da903d56b3deb5bd736013f8f1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38192
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/cpu/intel/hyperthreading/intel_sibling.c

@@ -15,7 +15,7 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/intel/hyperthreading.h>
 #include <device/device.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <smp/spinlock.h>
 
 #if CONFIG(PARALLEL_CPU_INIT)

src/drivers/pc80/rtc/mc146818rtc.c

@@ -17,6 +17,7 @@
 #include <fallback.h>
 #include <version.h>
 #include <console/console.h>
+#include <option.h>
 #include <pc80/mc146818rtc.h>
 #include <rtc.h>
 #include <string.h>
@@ -251,7 +252,7 @@ static enum cb_err locate_cmos_layout(struct region_device *rdev)
 	return CB_SUCCESS;
 }
 
-enum cb_err get_option(void *dest, const char *name)
+enum cb_err cmos_get_option(void *dest, const char *name)
 {
 	struct cmos_option_table *ct;
 	struct region_device rdev;
@@ -344,7 +345,7 @@ static enum cb_err set_cmos_value(unsigned long bit, unsigned long length,
 	return CB_SUCCESS;
 }
 
-enum cb_err set_option(const char *name, void *value)
+enum cb_err cmos_set_option(const char *name, void *value)
 {
 	struct cmos_option_table *ct;
 	struct region_device rdev;

src/ec/kontron/it8516e/ec.c

@@ -17,7 +17,7 @@
 #include <device/device.h>
 #include <device/pnp.h>
 #include <ec/acpi/ec.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 
 #include "ec.h"
 #include "chip.h"

src/ec/lenovo/h8/h8.c

@@ -20,7 +20,7 @@
 #include <ec/acpi/ec.h>
 #include <string.h>
 #include <smbios.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <pc80/keyboard.h>
 #include <types.h>
 

src/ec/lenovo/pmh7/pmh7.c

@@ -17,7 +17,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pnp.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <delay.h>
 #include <types.h>
 

src/include/option.h

@@ -1,19 +1,38 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
 #ifndef _OPTION_H_
 #define _OPTION_H_
 
-/*
- * FIXME: get_option() needs to be abstracted better so that other non-volatile
- * storage can be used. This will benefit machines without CMOS as well as those
- * without a battery-backed CMOS (e.g. some laptops).
- */
-#if CONFIG(USE_OPTION_TABLE)
-#include <pc80/mc146818rtc.h>
-#else
 #include <types.h>
-static inline enum cb_err get_option(void *dest, const char *name)
+
+enum cb_err cmos_set_option(const char *name, void *val);
+enum cb_err cmos_get_option(void *dest, const char *name);
+
+static inline enum cb_err set_option(const char *name, void *val)
 {
+	if (CONFIG(USE_OPTION_TABLE))
+		return cmos_set_option(name, val);
+
+	return CB_CMOS_OTABLE_DISABLED;
+}
+
+static inline enum cb_err get_option(void *dest, const char *name)
+{
+	if (CONFIG(USE_OPTION_TABLE))
+		return cmos_get_option(dest, name);
+
 	return CB_CMOS_OTABLE_DISABLED;
 }
-#endif
 
 #endif /* _OPTION_H_ */

src/include/pc80/mc146818rtc.h

@@ -181,9 +181,6 @@ int cmos_lb_cks_valid(void);
 int cmos_checksum_valid(int range_start, int range_end, int cks_loc);
 void cmos_set_checksum(int range_start, int range_end, int cks_loc);
 
-enum cb_err set_option(const char *name, void *val);
-enum cb_err get_option(void *dest, const char *name);
-
 #if CONFIG(CMOS_POST)
 #if CONFIG(USE_OPTION_TABLE)
 # include "option_table.h"

src/mainboard/asus/am1i-a/BiosCallOuts.c

@@ -22,7 +22,7 @@
 #include <northbridge/amd/agesa/state_machine.h>
 #include <FchPlatform.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <types.h>
 
 const BIOS_CALLOUT_STRUCT BiosCallouts[] =

src/mainboard/getac/p470/early_init.c

@@ -20,7 +20,7 @@
 #include <delay.h>
 #include <device/pnp_ops.h>
 #include <device/pci_ops.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <console/console.h>
 #include <northbridge/intel/i945/i945.h>
 #include <southbridge/intel/i82801gx/i82801gx.h>

src/mainboard/ibase/mb899/superio_hwm.c

@@ -17,7 +17,7 @@
 #include <types.h>
 #include <console/console.h>
 #include <device/device.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <superio/hwm5_conf.h>
 #include <superio/nuvoton/common/hwm.h>
 

src/mainboard/kontron/986lcd-m/early_init.c

@@ -17,7 +17,7 @@
 #include <device/pci_ops.h>
 #include <device/pnp_ops.h>
 #include <device/pnp_def.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <northbridge/intel/i945/i945.h>
 #include <southbridge/intel/i82801gx/i82801gx.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/kontron/986lcd-m/mainboard.c

@@ -18,7 +18,7 @@
 #include <device/device.h>
 #include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <superio/hwm5_conf.h>
 #include <superio/nuvoton/common/hwm.h>
 

src/mainboard/kontron/ktqm77/mainboard.c

@@ -22,7 +22,7 @@
 #if CONFIG(VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <arch/interrupt.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 

src/mainboard/lenovo/x60/smihandler.c

@@ -21,7 +21,7 @@
 #include <southbridge/intel/i82801gx/nvs.h>
 #include <southbridge/intel/common/pmutil.h>
 #include <ec/acpi/ec.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <ec/lenovo/h8/h8.h>
 #include <delay.h>
 #include "dock.h"

src/mainboard/roda/rk886ex/early_init.c

@@ -21,7 +21,7 @@
 #include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <northbridge/intel/i945/i945.h>
 #include <southbridge/intel/i82801gx/i82801gx.h>
 #include <superio/smsc/lpc47n227/lpc47n227.h>

src/northbridge/intel/gm45/igd.c

@@ -19,7 +19,7 @@
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <console/console.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 
 #include "gm45.h"
 

src/northbridge/intel/i945/early_init.c

@@ -21,7 +21,7 @@
 #include <device/pci_def.h>
 #include <cbmem.h>
 #include <romstage_handoff.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <types.h>
 
 #include "i945.h"

src/northbridge/intel/i945/gma.c

@@ -22,7 +22,7 @@
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <edid.h>
 #include <drivers/intel/gma/edid.h>
 #include <drivers/intel/gma/i915.h>

src/northbridge/intel/nehalem/raminit.c

@@ -24,7 +24,7 @@
 #include <cbmem.h>
 #include <cf9_reset.h>
 #include <ip_checksum.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <device/pci_def.h>
 #include <device/device.h>
 #include <halt.h>

src/northbridge/intel/pineview/early_init.c

@@ -20,7 +20,7 @@
 #include <device/pci.h>
 #include <northbridge/intel/pineview/pineview.h>
 #include <northbridge/intel/pineview/chip.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <types.h>
 
 #define LPC PCI_DEV(0, 0x1f, 0)

src/northbridge/intel/sandybridge/early_init.c

@@ -21,7 +21,7 @@
 #include <device/device.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <romstage_handoff.h>
 #include <types.h>
 

src/northbridge/intel/x4x/early_init.c

@@ -22,7 +22,7 @@
 #else
 #include <southbridge/intel/i82801jx/i82801jx.h> /* DEFAULT_PMBASE */
 #endif
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include "x4x.h"
 #include <console/console.h>
 #include <romstage_handoff.h>

src/soc/intel/broadwell/lpc.c

@@ -18,7 +18,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <pc80/isa-dma.h>
 #include <pc80/i8259.h>
 #include <arch/io.h>

src/soc/intel/broadwell/smihandler.c

@@ -27,7 +27,7 @@
 #include <spi-generic.h>
 #include <elog.h>
 #include <halt.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <soc/lpc.h>
 #include <soc/nvs.h>
 #include <soc/pci_devs.h>

src/soc/intel/common/block/pmc/pmclib.c

@@ -21,7 +21,7 @@
 #include <intelblocks/pmclib.h>
 #include <intelblocks/gpio.h>
 #include <intelblocks/tco.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <soc/pm.h>
 #include <stdint.h>
 #include <string.h>

src/southbridge/intel/bd82x6x/lpc.c

@@ -20,7 +20,7 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <pc80/isa-dma.h>
 #include <pc80/i8259.h>
 #include <arch/io.h>

src/southbridge/intel/bd82x6x/sata.c

@@ -20,7 +20,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <acpi/sata.h>
 #include <types.h>
 

src/southbridge/intel/common/smihandler.c

@@ -25,7 +25,7 @@
 #include <cpu/intel/em64t101_save_state.h>
 #include <elog.h>
 #include <halt.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <southbridge/intel/common/pmbase.h>
 #include <smmstore.h>
 

src/southbridge/intel/i82801dx/lpc.c

@@ -22,6 +22,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
+#include <option.h>
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
 #include <arch/io.h>

src/southbridge/intel/i82801gx/lpc.c

@@ -18,6 +18,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include <option.h>
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
 #include <pc80/i8259.h>

src/southbridge/intel/i82801ix/lpc.c

@@ -19,6 +19,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include <option.h>
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
 #include <pc80/i8259.h>

src/southbridge/intel/i82801ix/sata.c

@@ -22,7 +22,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <types.h>
 
 #include "chip.h"

src/southbridge/intel/i82801jx/lpc.c

@@ -19,6 +19,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include <option.h>
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
 #include <pc80/i8259.h>

src/southbridge/intel/i82801jx/sata.c

@@ -22,7 +22,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <types.h>
 
 #include "chip.h"

src/southbridge/intel/ibexpeak/lpc.c

@@ -19,6 +19,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include <option.h>
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
 #include <pc80/i8259.h>

src/southbridge/intel/ibexpeak/sata.c

@@ -21,7 +21,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <acpi/sata.h>
 #include <types.h>
 

src/southbridge/intel/lynxpoint/lpc.c

@@ -20,7 +20,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <pc80/isa-dma.h>
 #include <pc80/i8259.h>
 #include <arch/io.h>

src/southbridge/intel/lynxpoint/smihandler.c

@@ -25,7 +25,7 @@
 #include <cpu/intel/em64t101_save_state.h>
 #include <elog.h>
 #include <halt.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <southbridge/intel/common/finalize.h>
 #include <northbridge/intel/haswell/haswell.h>
 #include <cpu/intel/haswell/haswell.h>

src/superio/ite/it8720f/superio.c

@@ -18,7 +18,7 @@
 #include <device/device.h>
 #include <device/pnp.h>
 #include <pc80/keyboard.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <superio/ite/common/env_ctrl.h>
 #include <superio/conf_mode.h>
 #include <types.h>

src/superio/nuvoton/nct5572d/superio.c

@@ -20,7 +20,7 @@
 #include <device/device.h>
 #include <device/pnp.h>
 #include <pc80/keyboard.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <arch/acpi.h>
 #include <superio/conf_mode.h>
 

src/superio/winbond/w83627ehg/superio.c

@@ -23,7 +23,7 @@
 #include <superio/hwm5_conf.h>
 #include <console/console.h>
 #include <pc80/keyboard.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 
 #include "w83627ehg.h"
 

src/superio/winbond/w83627hf/superio.c

@@ -23,7 +23,7 @@
 #include <superio/hwm5_conf.h>
 #include <console/console.h>
 #include <pc80/keyboard.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 
 #include "w83627hf.h"
 

src/superio/winbond/w83667hg-a/superio.c

@@ -20,7 +20,7 @@
 #include <device/device.h>
 #include <device/pnp.h>
 #include <pc80/keyboard.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
 #include <arch/acpi.h>
 #include <superio/conf_mode.h>